F-RAM Memory Device Secure Authentication via AES128
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Solution Overview
Problem
Existing authentication protocols for memory devices require significant processing power and often compromise on security, with floating gate non-volatile memories being vulnerable to side channel attacks and slow write times, which can lead to insecure critical security parameter updates.
Innovation Solution
An F-RAM memory device utilizing AES128 encryption, a true hardware random number generator, and exclusive OR functions for secure mutual authentication between a Host system and the memory, ensuring secure access to user memory contents with built-in self-test circuitry and quick erase capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If floating gate non-volatile memory is used for authentication, then non-volatile data storage is achieved, but write time becomes significantly slower and vulnerable to side channel attacks
Solution Approach 1:
The patent changes the physical parameter of the memory technology from floating gate to ferroelectric material, which fundamentally alters the write mechanism and speed characteristics while maintaining non-volatile storage capability
Solution Approach 2:
The patent uses F-RAM's faster write capabilities to create a secure authentication protocol that completes before attackers can perform side channel analysis, effectively copying the security function with improved temporal characteristics
2Duration of action of stationary object
If floating gate non-volatile memory is used for authentication, then non-volatile data storage is achieved, but the device becomes vulnerable to side channel attacks due to distinctive write vs. read current profile
Solution Approach 1:
The patent converts the harmful distinctive current profile of floating gate memory into a benefit by using F-RAM's balanced read/write current signature, which masks authentication operations from side channel attackers while maintaining security parameter storage
3Ease of operation
If existing authentication protocols are used, then authentication functionality is provided, but processing power requirements are excessive and security is compromised
Solution Approach 1:
The patent extracts the essential authentication functionality from complex existing protocols, retaining only the core mutual authentication mechanism while removing unnecessary processing overhead and security vulnerabilities
Solution Approach 2:
The patent inverts the traditional authentication approach by using F-RAM's physical characteristics (fast write, balanced current signature) as the security foundation rather than relying on computationally intensive algorithms
4Duration of action of stationary object
If critical security parameters are updated in non-volatile memory, then persistent security storage is achieved, but the extended time window allows interference during update
Solution Approach 1:
The patent uses F-RAM's fast write capability to complete critical security parameter updates in a time window too short for attackers to interfere, effectively skipping through the vulnerable update phase before security can be compromised
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides secure, efficient, and fast authentication with reduced processing power, preventing side channel attacks and ensuring secure updates of critical security parameters, while ensuring the same data is never transmitted twice across multiple authentications.
Implementation Method 1
ferroelectric random access memory (F-RAM) devices provide non-volatile data storage through the use of a ferroelectric dielectric material which may be polarized in one direction or another in order to store a binary value. The ferroelectric effect allows for the retention of a stable polarization in the absence of an applied electric field due to the alignment of internal dipoles within the Perovskite crystals in the dielectric material.
Implementation Method 2
The authentication procedure disclosed utilizes secure encryption keys/passwords and Host/user ID's stored in non-volatile ferroelectric memory (F-RAM) and are referred to as critical security parameters, or CSPs... uses only an Advanced Encryption Standard AES128 encryption module in conjunction with a random number generator and basic exclusive OR (XOR) functions
Data Source
AI summary
A memory device including a ferroelectric memory array is described. In one embodiment, the ferroelectric memory array includes a user memory space. The memory device includes control logic configured to provide external read and write access for a host system to the user memory space upon authentication between the host system and the memory device. The host system accesses the user memory space and communicates with the control logic through address, data and control buses. The memory device further includes memory interface configured to interface between the address, data and control buses and the control logic, and through which the host system communicates with the control logic, and a cipher engine in communication with the control logic and the memory interface, the cipher engine comprising a random number generator and an encryption/decryption block. Other embodiments are also described.