FRAM Bit Error Correction via Margin Mode Read and Recovery Refresh
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Ferro-electric random access memory (FRAM) experiences data retention issues due to polarization relaxation, imprint, and thermal depolarization, leading to reduced reliability and data integrity, especially at elevated temperatures.
Innovation Solution
A semiconductor device with an FRAM storage unit and a method that uses a control unit to read FRAM cells in a margin mode with a test data pattern, allowing for bit error detection and correction by switching to a recovery mode with increased sensitivity and parameters to refresh and restore data, thereby addressing thermal degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If standard read sensitivity is used to read FRAM cells, then data can be read quickly, but bit errors occur due to thermal depolarization and polarization relaxation
Solution Approach 1:
The patent applies preliminary action by performing a read operation in margin mode before the main read operation to detect potential bit errors caused by thermal depolarization. This preliminary detection allows the system to identify degraded bits before attempting to read the actual data, enabling proactive error correction rather than reactive handling.
Solution Approach 2:
The patent introduces an intermediary test data pattern that is written to FRAM cells and used to detect thermal depolarization effects. This test pattern acts as a mediator between the storage medium and the data processing logic, allowing the system to detect and correct bit errors without directly examining the actual data bits.
2Reliability
If margin mode with test data pattern is used to detect bit errors, then data integrity can be verified, but read speed decreases due to additional operations
Solution Approach 1:
The patent implements periodic action by performing margin mode reads at specific intervals (e.g., during power-up, after temperature changes, or at predetermined time intervals) rather than continuously. This periodic verification maintains data integrity while minimizing the impact on overall read speed by only performing additional checks when necessary.
Solution Approach 2:
The patent changes the read sensitivity parameter dynamically by using margin mode (lower sensitivity) for error detection and standard mode (higher sensitivity) for normal data reading. This parameter adjustment allows the system to optimize between detection capability and read speed by using the appropriate mode based on the operational context.
3Reliability
If recovery mode with increased sensitivity is used to refresh FRAM cells, then thermal depolarization effects can be corrected, but energy consumption increases
Solution Approach 1:
The patent extracts only the bits that are actually affected by thermal depolarization for correction, rather than refreshing the entire FRAM array. By identifying degraded bits through the test data pattern and selectively refreshing only those specific cells, the system maintains data integrity while significantly reducing the energy consumption associated with full-array refresh operations.
Solution Approach 2:
The patent applies partial action by performing recovery mode operations only on FRAM cells that are identified as degraded through margin mode testing, rather than applying the energy-intensive recovery process to all cells. This selective approach ensures that correction resources are concentrated where actually needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively identifies and corrects bit errors in FRAM storage units, ensuring data integrity and reliability by using a test data pattern to detect thermal degradation and applying enhanced read and write parameters to restore data, even under thermal stress.
Implementation Method 1
The capability of non-volatile data storage in FRAMs is based on the spontaneous polarization effect of ferro-electric materials like lead zirkonate titanate (PZT) due to an applied electric field. The spontaneous polarization is typically due to a displacement of a single atom in the crystal structure
Implementation Method 2
The polarization change of a ferro-electric capacitor versus an applied voltage is exemplarily shown in FIG. 1. Due to the remanent polarization, this curve shows a hysteresis loop like ferro-magnetic materials. A remanent polarization remains after removal of the electric field
Implementation Method 3
Finally, there is thermal depolarization which is a reduction of the spontaneous polarization with increasing temperature of the ferro-electric material. Thermal depolarization is due to the effect that the spontaneous polarization decreases if the temperature of the ferro-electric material approaches the phase transition temperature, i.e. the Curie Temperature TC
Data Source
AI summary
An embodiment of semiconductor device including a control unit and an FRAM storage unit is disclosed. The FRAM storage unit contains FRAM cells. The control unit includes a predetermined test data pattern. The control unit is configured to read the FRAM cells that contain a test data pattern in a margin-mode, compare the read out bit information with the test data pattern to determine whether a bit error is present in the dedicated FRAM cells. When a bit error is present, the control unit is configured to read-out the complete FRAM storage unit in a recovery-mode and refresh all FRAM cells of the FRAM storage unit by writing back the read out bit information to the respective FRAM cells. In the margin-mode, the read operation is performed using a lower read-sensitivity compared to the read operation reading out the complete FRAM storage unit that is performed in the recovery-mode.