FRAM Imprint Reduction via Preferred State Holding

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Solution Overview

Problem

Ferroelectric random-access memory (FRAM) arrays face reliability issues due to imprint, where memory cells tend to maintain a data state over time, leading to signal margin loss and device degradation, especially under temperature exposure.

Innovation Solution

Writing all ferroelectric memory cells in a FRAM array to a preferred data state before a qualifying event, such as high temperature exposure, to minimize imprint, with the option to resume normal operation once the event ends, either by anticipation or detection of the event.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ferroelectric memory cells are left in the same data state for a prolonged period of time, then the memory maintains its data state, but imprint develops leading to signal margin loss and device degradation

Engineering Contradiction:
Improvememory reliabilityVSAvoidsignal margin loss
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent applies preliminary action by detecting a qualifying event (such as high temperature exposure) and proactively writing all memory cells to a preferred data state before the event causes imprint damage. This preventive measure is taken in advance to minimize the development of imprint, thereby maintaining signal margins and improving memory reliability without requiring real-time intervention during the actual damage process

Inventive Principle:
Principle #10Preliminary action

2Reliability

If all memory cells are written to a preferred data state before a qualifying event, then imprint is minimized and reliability is improved, but normal memory operation is interrupted

Engineering Contradiction:
Improvememory reliabilityVSAvoidmemory operation continuity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements feedback by using a qualifying event detector that continuously monitors for specific conditions (such as high temperature exposure). When the detector identifies a qualifying event, it triggers the control circuitry to switch to the protective mode of writing all cells to a preferred state. After the event concludes, the system receives feedback and automatically resumes normal memory operations, thus dynamically balancing reliability protection with operational continuity

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS7667997B2Method to improve ferroelectronic memory performance and reliability
Publication Date: 2010.02.23 TEXAS INSTRUMENTS INC
  • US7667997B2 patent drawing
  • US7667997B2 patent drawing
  • US7667997B2 patent drawing

AI summary

One embodiment of the present invention relates to a method by which the imprint of a ferroelectric random access memory (FRAM) array is reduced. The method begins when an event that will cause imprint to the memory array is anticipated by an external agent to the device comprising the chip. The external agent sends a command to the control circuitry that the data states are to be written to a particular data state. Upon receiving a signal the control circuitry writes all of the ferroelectric memory cells in the FRAM array to a preferred memory data state. The memory data states are held in the preferred data state for the entire duration of the event to minimize imprint of the FRAM memory cells. When the event ends the external agent sends a command to the control circuitry to resume normal memory operation. Other methods and circuits are also disclosed.