Dual Mode FRAM Cell Imprinting Read-Only Data via Over-Stress
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Solution Overview
Problem
Current semiconductor RAM technologies, such as DRAM and FRAM, face challenges in maintaining data integrity when power is off, requiring frequent refresh operations for volatile memory and relying on complex dielectric materials that can leak charge, limiting their non-volatile storage capabilities.
Innovation Solution
The implementation of a dual mode memory cell structure that imprints read-only data during manufacturing by applying an over-stress condition to ferroelectric capacitors, allowing for permanent biasing of state-determining properties without incapacitating normal read/write operations, enabling storage of both accessible and imprinted data bits within the same cell.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ferroelectric capacitors are used to store data in FRAM, then non-volatile storage capability is improved, but data integrity and retention without power are still limited compared to true non-volatile memory
Solution Approach 1:
The patent applies an over-stress condition during manufacturing to pre-establish a stable polarized state in the ferroelectric capacitor. This preliminary action creates a biased initial state that enhances the stability and retention of stored data, allowing the memory to maintain data integrity for longer periods without power cycles.
Solution Approach 2:
The patent modifies the physical state of the ferroelectric capacitor by applying an over-stress condition that permanently alters the polarized state. This parameter change creates a more stable energy well for data storage, improving both reliability and retention duration by establishing a deeper potential barrier against spontaneous depolarization.
2Quantity of substance
If dual mode storage cells are implemented to store both read-only and accessible data bits, then storage capacity is improved, but device complexity increases
Solution Approach 1:
The patent makes the same ferroelectric capacitor serve multiple functions: storing both a read-only data bit (through imprinted polarized state) and an accessible data bit (through normal write operations). This multi-functionality doubles the effective storage capacity without adding separate storage elements, thereby avoiding increased device complexity.
Solution Approach 2:
The patent combines the read-only memory function and random access memory function into a single memory cell structure. By merging these two functions into one capacitor, the patent achieves enhanced storage capacity while maintaining simplicity in the overall cell architecture.
3Duration of action of stationary object
If over-stress condition is applied during manufacturing to imprint read-only data, then data retention is improved, but manufacturing process complexity increases
Solution Approach 1:
The over-stress condition is applied during the manufacturing process to pre-establish the desired polarized state in the ferroelectric capacitor. This preliminary action imprints the read-only data before the memory devices are deployed, ensuring long-term data retention without requiring additional complex structures or materials.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the creation of dual mode storage cells that can store two logical bits of information, with the imprinted read-only bit accessible via a special read operation, enhancing data retention and reducing the need for frequent refresh operations while maintaining normal read/write functionality.
Implementation Method 1
the capacitor includes a 'ferroelectric' fabricated between the plates rather than a dielectric as in the case of a standard capacitor. A characteristic of ferroelectric material such as lead zirconate titanate is that it includes a crystalline lattice of molecules capable of forming and trapping electric dipoles
Implementation Method 2
imprint read-only ('RO') data to storage cells of a memory array during manufacturing. As used herein, the term 'imprint' means to apply an over-stress condition to one or more state-determining elements of one or more storage cells of the array after the state-determining elements have been set to a selected state
Data Source
AI summary
Read-only (“RO”) data to be permanently imprinted in storage cells of a memory array are written to the memory array. One or more over-stress conditions such as heat, over-voltage, over-current and/or mechanical stress are then applied to the memory array or to individual storage cells within the memory array. The over-stress condition(s) act upon one or more state-determining elements of the storage cells to imprint the RO data. The over-stress condition permanently alters a value of a state-determining property of the state-determining element without incapacitating normal operation of the storage cell. The altered value of the state-determining property biases the cell according to the state of the RO data bit. The bias is detectable in the cell read-out signal. A pre-written ferroelectric random-access memory (“FRAM”) array is baked. Baking traps electric dipoles oriented in a direction corresponding to a state of the pre-written data and forms am RO data imprint.


