FRAM Memory Fast Block Write for RFID Tags

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Solution Overview

Problem

Existing passive RFID tags using EEPROM memory are inefficient for high-speed data throughput applications due to slow write times and the need for inefficient data protocol methods, particularly with the EPC Global Generation 2 standard's Block Write command.

Innovation Solution

A fast block write command is implemented for RFID tags using FRAM memory, which employs a stored address pointer to write data directly to a known safe block without an intermediate buffer, and verifies data integrity with a cyclic redundancy check, allowing for efficient and verified block write operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If EEPROM memory is used in passive RFID tags, then the system is simple and reliable, but the data transfer rate is slow and throughput is limited

Engineering Contradiction:
Improvedata transfer rateVSAvoidthroughput
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The patent changes the memory technology parameter from EEPROM to FRAM (Ferroelectric Random Access Memory), which fundamentally alters the data transfer characteristics. FRAM enables significantly faster read/write operations and higher throughput while maintaining the passive RFID tag architecture, directly resolving the speed and productivity limitations of EEPROM-based systems

Inventive Principle:
Principle #35Parameter changes

2Productivity

If existing EPC Block Write protocol is used, then compatibility is maintained, but the protocol is inefficient for fast memory technologies like FRAM

Engineering Contradiction:
Improveblock write efficiencyVSAvoidmemory access time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements preliminary action by establishing a dedicated write buffer in FRAM memory before the actual block write operation. The buffer is prepared in advance to receive data, and the write pointer is pre-positioned, allowing the block write to proceed continuously without repeated memory access delays, thus optimizing both productivity and reducing time loss

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary mechanism - a write buffer - between the data source and the FRAM memory. This buffer acts as a mediator that temporarily stores data and manages the write pointer, enabling efficient block writes by avoiding direct repeated access to the FRAM memory for each data byte, thereby improving block write efficiency and reducing access time

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If multiple memory accesses are performed for verified block writes, then data integrity is ensured, but the number of operations increases and throughput decreases

Engineering Contradiction:
Improvedata integrityVSAvoidthroughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent ensures continuity of useful action by implementing a persistent write buffer that maintains its contents across memory access operations. The buffer is designed to retain data and the write pointer position, allowing verified block writes to proceed continuously without interruption or repeated operations, thus ensuring data integrity while maintaining high throughput

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS8686836B2Fast block write using an indirect memory pointer
Publication Date: 2014.04.01 CYPRESS SEMICONDUCTOR CORP
  • US8686836B2 patent drawing
  • US8686836B2 patent drawing
  • US8686836B2 patent drawing

AI summary

A fast block write command includes providing an RFID tag having a memory, and using a stored address pointer to point to a known address in the memory, wherein the stored address pointer points to a starting address at a known safe block in the memory. The method is performed without an intermediate buffer. The received data is written to the known safe block and a cyclic redundancy check is computed on the received data. If the cyclic redundancy check matches, the received data is retained and the stored address pointer is updated. If the cyclic redundancy check does not match, the stored address pointer is kept for a future write operation. Further block writes can be disallowed after an initial successful block write.