Frame Buffer Synchronization for Display Devices

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Solution Overview

Problem

Existing frame rate conversion methods in display devices suffer from frame-tear issues and unsteady video object movement due to differences in input and output frame rates, and conventional synchronization methods fail to adjust frame rates while preventing data overflow or underflow, leading to compatibility issues with various digital display devices.

Innovation Solution

A frame synchronization method that temporarily stores input data in a frame buffer according to an input time sequence, generates an output time sequence with a delay, and outputs data to match the input sequence, ensuring an average frame rate match between source and destination frames without increasing buffer size, thus preventing frame-tear and unsteady movement.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the number of frame buffers is increased to store enough frame data for frame rate conversion, then the frame-tear problem is solved, but the device complexity and material cost increase

Engineering Contradiction:
Improveframe-tear problemVSAvoidnumber of frame buffers
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple frame buffer functions into a single frame buffer by implementing a dual-pointer architecture. The first pointer reads frame data for display while the second pointer writes incoming frame data, allowing the single buffer to serve multiple purposes (storing both previous and current frames) through time-multiplexed access patterns.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs dynamic pointer adjustment mechanisms where the first and second pointers are selectively activated based on frame rate conditions. When input frame rate exceeds output frame rate, the first pointer reads from the buffer; when output frame rate exceeds input frame rate, the second pointer writes to the buffer. This dynamic switching eliminates the need for multiple static buffers.

Inventive Principle:
Principle #15Dynamics

2Productivity

If frame rate conversion is performed using conventional methods with multiple frame buffers, then frame rate adjustment is achieved, but video objects appear to move at unsteady speed

Engineering Contradiction:
Improveframe rate adjustmentVSAvoidvideo object movement smoothness
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The patent implements a feedback mechanism through the second pointer that continuously monitors the frame buffer status and adjusts the writing timing of incoming frame data. This feedback control ensures that frame data is written at optimal moments, maintaining temporal coherence and preventing the unsteady movement effect by synchronizing buffer writes with the display timing requirements.

Inventive Principle:
Principle #23Feedback

3Reliability

If line buffers with control circuits are used for frame synchronization, then data overflow and underflow are prevented, but implementation complexity increases

Engineering Contradiction:
Improvedata synchronizationVSAvoidcontrol circuits
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The frame buffer performs self-synchronization through its dual-pointer architecture without requiring external control circuits. The buffer automatically manages data flow by having the first pointer read data at display timing and the second pointer write data at input timing, with the buffer's inherent structure preventing overflow and underflow conditions through proper timing coordination.

Inventive Principle:
Principle #25Self-service

4Reliability

If conventional frame synchronization methods are used, then data overflow and underflow are prevented, but frame rate cannot be changed during displaying

Engineering Contradiction:
Improvedata synchronizationVSAvoidframe rate adjustment capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent enables dynamic frame rate adjustment during display operation by selectively activating the first or second pointer based on real-time frame rate conditions. The system can switch between read-dominant mode (when input frame rate is higher) and write-dominant mode (when output frame rate is higher), providing adaptability while maintaining synchronization reliability through the same buffer structure.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7830450B2Frame synchronization method and device utilizing frame buffer
Publication Date: 2010.11.09 REALTEK SEMICON CORP
  • US7830450B2 patent drawing
  • US7830450B2 patent drawing
  • US7830450B2 patent drawing

AI summary

A frame synchronization method includes: temporarily storing input data of at least one source frame in a frame buffer according to an input time sequence; generating an output time sequence according to the input time sequence and a delay time; generating output data of a destination frame according to the input data of the source frame; and outputting the output data of the destination frame according to an output time sequence; wherein an average frame rate of the source frame is substantially the same as that of the destination frame.