Frame Error Correction Using Redundant Signal Permutations
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Solution Overview
Problem
Wireless communication systems employing diversity schemes face challenges in accurately identifying and correcting errors in redundant data frames, particularly due to errors occurring at different bit positions in multiple data streams, which can lead to inconsistencies and affect data integrity.
Innovation Solution
A frame error correction circuit that compares bit positions across multiple redundant data streams, identifies inconsistent positions, and uses permutation tables to reassemble data frames, performing CRC calculations on permutations to ensure error checking code consistency and correct errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If diversity communication schemes are used to transmit redundant data frames, then the reliability of data transmission is improved, but the complexity of error identification and correction increases due to inconsistent bit positions across multiple data streams
Solution Approach 1:
The error correction process is segmented into distinct functional blocks: a data interface circuit for receiving frames, a bit position comparison circuit for identifying inconsistent positions, a frame permutation assembly circuit for generating permutations, and a frame error checking circuit for validation. This segmentation allows each component to perform a specific task, managing overall system complexity while maintaining high reliability through comprehensive error correction
Solution Approach 2:
The patent introduces a permutation dimension by generating multiple versions of data frames with bits from inconsistent positions permuted in different orders. This dimensional approach transforms the error correction problem from simply selecting one of the original redundant frames to exploring a expanded space of permuted frames, enabling correction of errors that would otherwise be undetectable in the original diverse streams
2Manufacturing precision
If bit-wise comparison and permutation assembly are performed to correct errors, then data integrity is improved, but the processing time and computational resources increase
Solution Approach 1:
The bit position comparison circuit performs preliminary identification of inconsistent bit positions across redundant data frames before permutation assembly is attempted. This preliminary action filters the search space by focusing permutation operations only on identified inconsistent positions rather than all possible bit positions, significantly reducing processing time while maintaining complete error correction capability
Solution Approach 2:
The frame permutation assembly circuit applies permutations locally only to bits at inconsistent positions identified by the comparison circuit, rather than permuting entire frames or all bit positions. This localized approach reduces computational complexity and processing time while maintaining data integrity by concentrating correction efforts where errors are most likely to occur
Data Source
AI summary
A frame error correction circuit may identify and correct errors in data frames provided to a receiver as part of a diversity communications scheme. The frame error correction circuit may further align the data frames so that the data frames can be compared. The frame error correction circuit may perform a bit-wise comparison of the data frames and identify inconsistent bit positions where bits in the data frames differ from one another. Once inconsistent bit positions have been identified, the frame error correction circuit may access a permutation table of permutations of bits at the inconsistent bit positions. In some implementations, the frame error correction circuit uses the permutation table to reassemble permutations of the data frames. In various implementations, the frame error correction circuit performs a CRC of each permutation of the data frames, and provides a valid permutation to a network.