Frame Management Instruction for Large Block Address Translation
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Solution Overview
Problem
Current dynamic address translation facilities lack enhanced functionality, capability, and protection mechanisms, limiting their effectiveness in managing large blocks of data and providing efficient address translation in computer systems.
Innovation Solution
The introduction of a frame management function that utilizes a hierarchy of translation tables to translate virtual addresses into real or absolute addresses, with features such as access-protection bits and block size indications to manage large blocks of data, and the ability to determine whether an operand is a large or small block based on a block size indication in a machine instruction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If dynamic address translation is implemented with basic functionality, then address translation capability is provided, but functionality and protection mechanisms are limited
Solution Approach 1:
The patent segments the address translation functionality into distinct components: translation tables for address mapping, frame management instructions for control operations, and access-protection bits for security. This segmentation allows each component to be optimized independently while providing comprehensive functionality without excessive overall complexity.
Solution Approach 2:
The frame management instruction serves multiple functions: it manages large blocks of data, provides access protection, and controls translation table operations. This multi-functionality enhances the adaptability of the address translation facility without requiring separate dedicated instructions for each operation.
2Productivity
If traditional address translation is used, then basic address mapping is achieved, but management of large data blocks is inefficient
Solution Approach 1:
The patent merges multiple small data blocks into a single large block managed by one frame management instruction. This combining approach improves productivity by reducing the number of translation operations needed while the hierarchical translation table structure manages the increased complexity of large block management.
Solution Approach 2:
The patent introduces a new dimension of block size management by implementing support for both small and large blocks within the address translation facility. The block size indication field enables the system to operate in different dimensional modes (small block vs. large block) depending on the requirements, optimizing efficiency for different data access patterns.
3Reliability
If access protection mechanisms are added to enhance security, then protection capability is improved, but system complexity increases
Solution Approach 1:
The access-protection bits are integrated directly into the translation table entries and frame management instructions, allowing the address translation facility to enforce protection automatically without requiring external security management mechanisms. This self-service approach improves protection capability while minimizing additional system complexity.
4Productivity
If block size indication is implemented to manage large blocks, then data block management efficiency is improved, but instruction complexity increases
Solution Approach 1:
The block size indication is implemented as a specific field within the frame management instruction rather than requiring a completely new instruction format. This localized modification allows the system to differentiate between small and large block operations without fundamentally changing the overall instruction structure, thereby improving block management efficiency while limiting increases in instruction complexity.
Data Source
AI summary
Creating a computer program product or a computer system to execute a frame management instruction which identifies a first and second general register. The first general register contains a frame management field having a key field with access-protection bits and a block-size indication. If the block-size indication indicates a large block then an operand address of a large block of data is obtained from the second general register. The large block of data has a plurality of small blocks each of which is associated with a corresponding storage key having a plurality of storage key access-protection bits. If the block size indication indicates a large block, the storage key access-protection bits of each corresponding storage key of each small block within the large block is set with the access-protection bits of the key field.