Frame Management Function for Storage Block Clearing
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Solution Overview
Problem
Current dynamic address translation facilities lack enhanced functionality, capability, and protection mechanisms, limiting their effectiveness in managing virtual address translation and storage management in computer systems.
Innovation Solution
The implementation of a frame management function within a computer system's machine architecture, utilizing a hierarchy of translation tables to translate virtual addresses into real or absolute addresses, with features like prefixing for absolute address formation and enhanced protection bits for secure access control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If dynamic address translation is used to provide virtual storage, then storage capacity is improved, but protection and isolation between address spaces deteriorates
Solution Approach 1:
The patent introduces separate protection bits (first protection bit and second protection bit) for different address spaces (primary address space and secondary address space). This segmentation allows independent protection control for each address space while maintaining the virtual storage capability, thereby resolving the contradiction between storage capacity and protection.
Solution Approach 2:
The patent applies different protection attributes to different address spaces. The first protection bit applies to the primary address space while the second protection bit applies to the secondary address space. This local quality approach enables selective protection based on address space requirements, maintaining both virtual storage functionality and security.
2Adaptability or versatility
If frame management function is added to manage large data blocks, then storage management capability is improved, but device complexity increases
Solution Approach 1:
The patent combines the frame management function with the existing dynamic address translation facility by integrating protection bits into the translation mechanism. The frame management capabilities are merged into the address translation process rather than being implemented as a separate complex system, thereby improving storage management capability while minimizing additional complexity.
Solution Approach 2:
The protection bits serve multiple functions: they provide protection for address spaces, enable frame management for large data blocks, and maintain isolation between different address spaces. This multi-functionality approach allows the system to handle complex storage management tasks without proportionally increasing device complexity.
Data Source
AI summary
What is disclosed is a frame management function defined for a machine architecture of a computer system. In one embodiment, a machine instruction is obtained containing an opcode for a frame management instruction identifying a first and second general register. Clear frame information is obtained from the first general register having a frame size field indicating whether a storage frame is a small or large block of data. The second general register contains an operand address of a storage frame. If the storage frame is a small block, all bytes of the small block of data are set to zero. If the storage frame is a large block of data, an operand address of an initial first block of data within the large block is obtained from the second general register. All data of all blocks within the large block are cleared starting from the initial first block.