Frame Memory Compression Using Block Quantization and Variable Length Encoding

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Solution Overview

Problem

Existing frame memory compression techniques face limitations in reducing frame memory size and system bandwidth, particularly in video processing, with spatial domain methods requiring high complexity and frequency domain methods being unsuitable for low-latency applications.

Innovation Solution

A block-based frame memory compression method using a quantizer, predictor, and variable length encoder, which divides image frames into blocks, applies quantization, prediction, and variable length coding, and employs a packing unit to produce a codeword sequence that meets a target bit rate through a group of blocks structure, allowing flexible sharing of available spaces.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of stationary object

If spatial domain FMC techniques are used to reduce frame memory size, then frame memory size is reduced, but device complexity increases due to high computation requirements

Engineering Contradiction:
Improveframe memory sizeVSAvoidcomputation complexity
Core Design Contradiction:
Volume of stationary objectVSDevice complexity

Solution Approach 1:

The patent divides the frame memory compression process into distinct functional modules: quantizer for bit removal, predictor for residual computation, variable length encoder for compression, and packing unit for optimization. Each module handles a specific aspect of compression, reducing overall computational complexity while achieving effective compression ratios.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs adjustable quantization parameters to control the compression process. By varying the quantization parameter, the system can dynamically adjust the number of bits removed from pixel values, allowing flexible control over the trade-off between compression ratio and computational complexity.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If frequency domain FMC techniques are used to compress data, then compression efficiency is improved, but latency increases making it unsuitable for low-latency applications

Engineering Contradiction:
Improvedata volumeVSAvoidprocessing latency
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent extracts only the most significant bits from pixel values through quantization, discarding less significant information. This selective extraction approach achieves effective compression without requiring complex frequency domain transformations, thereby maintaining low processing latency while reducing data volume.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If fixed compression ratio FMC is applied, then hardware bandwidth is reduced, but adaptability to different bit rate requirements is limited

Engineering Contradiction:
Improvebandwidth utilizationVSAvoidbit rate flexibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent implements a dynamic packing unit that can adaptively adjust the compression process based on available bit rate requirements. The packing unit flexibly packs quantized pixel values and residual data together, allowing the system to dynamically adjust the compression ratio to meet different bandwidth constraints and quality requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent creates a multi-functional compression apparatus that can handle various compression scenarios through a unified framework. The same core components (quantizer, predictor, encoder, packing unit) serve multiple functions by adjusting their operation parameters, enabling the system to adapt to different bit rate requirements without requiring separate dedicated systems.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8767823B2Method and apparatus for frame memory compression
Publication Date: 2014.07.01 IND TECH RES INST
  • US8767823B2 patent drawing
  • US8767823B2 patent drawing
  • US8767823B2 patent drawing

AI summary

A method for frame memory compression divides each of a plurality of image frames in a frame memory into a plurality of blocks and quantizes a plurality of pixel values inside each block according to a predefined parameter, thereby generating a quantized block and a plurality of removed bits from the binary representation of the plurality of pixel values. A predictor is used to produce a residual block for the quantized block. A variable length encoder takes the residual block as an input and produces a coded bitstream. A packing unit is used to take the coded bitstream and the number of removed bits generated by the quantizer as inputs, so as to produce an entire codeword sequence of the block that meets a target bit rate by using a structure called group of blocks (GOB) to flexibly share available spaces of the blocks in the same GOB.