Frame Memory Control Using Single-Area Read-Write Buffers

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Solution Overview

Problem

Existing display devices require two memory areas for storing current and previous frame data, leading to increased memory capacity and power consumption.

Innovation Solution

A data processing device with a writing line buffer and a reading line buffer, along with a memory controller, allows for the simultaneous reading of previous frame data and writing of current frame data in a single memory area, using a queue structure for the reading buffer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If two memory areas are used to store current and previous frame data, then the reliability of frame data storage is improved, but the memory capacity and size increase

Engineering Contradiction:
Improveframe data storage reliabilityVSAvoidmemory capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges the storage of current frame data and previous frame data into a single memory area by using a dual-buffer structure where the same memory space is alternately used for different frame data through pointer switching, eliminating the need for separate memory areas and reducing overall memory capacity requirements

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements dynamic memory allocation by using movable pointers (first pointer and second pointer) that switch between different buffer regions within the same memory area, allowing the memory system to dynamically allocate storage space for current and previous frame data without requiring fixed separate memory areas

Inventive Principle:
Principle #15Dynamics

2Reliability

If two memory areas are used to store current and previous frame data, then the reliability of frame data storage is improved, but the power consumption increases

Engineering Contradiction:
Improveframe data storage reliabilityVSAvoidmemory device power consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent merges the storage of current frame data and previous frame data into a single memory area by using a dual-buffer structure where the same memory space is alternately used for different frame data through pointer switching, eliminating the need for separate memory areas and reducing overall memory capacity requirements

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent recovers and reuses memory space by overwriting previous frame data with current frame data in alternating buffer regions, allowing the same memory area to be continuously reused for both current and previous frame storage, thereby reducing the total memory capacity needed and lowering power consumption

Inventive Principle:
Principle #34Discarding and recovering

3Quantity of substance

If a single memory area is used for both reading and writing frame data, then the memory capacity and size are reduced, but the complexity of memory control increases

Engineering Contradiction:
Improvememory capacityVSAvoidmemory control complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent segments the single memory area into two distinct buffer regions (first buffer and second buffer) that are alternately used for storing current and previous frame data, with each buffer having dedicated pointer control, thereby simplifying the overall memory control logic while reducing memory capacity requirements

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces pointer mechanisms (first pointer and second pointer) as intermediaries to manage the single memory area, where the pointers automatically switch between buffer regions based on frame data status, thereby simplifying the control logic by abstracting the complexity of single-area management

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP4657425A1Data processing device and memory control method of data processing device
Publication Date: 2025.12.03 LX SEMICON CO LTD
  • EP4657425A1 patent drawingFigure 1~2
  • EP4657425A1 patent drawingFigure 3~4
  • EP4657425A1 patent drawingFigure 5~6

AI summary

The present disclosure relates to a data processing device and a memory control method of a data processing device, and in particular, to a data processing device and a memory control method of a data processing device that perform reading of previous previous frame data and writing of current frame data in one memory area.