Frame-Shaped Alignment Mark for Leakage Current Reduction
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Solution Overview
Problem
In high-integration semiconductor devices, such as NAND flash memory, the narrow interconnect spacing increases the risk of leakage current and reduces insulation breakdown voltage due to positional shifts during the formation of alignment marks, making it difficult to achieve precise alignment between interconnects.
Innovation Solution
A semiconductor device design that includes a frame-shaped alignment mark with a step feature between the alignment mark and the insulating film, which helps to suppress positional shifts and reduce leakage current by providing a detectable step for optical alignment during exposure processing, thereby enhancing the insulation breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If alignment marks are formed in high-integration semiconductor devices, then positional shift detection is improved, but leakage current increases due to narrow interconnect spacing
Solution Approach 1:
The alignment mark is divided into multiple segments including a first alignment mark, a second alignment mark, and a frame-shaped alignment mark. These segmented components are distributed at different locations (first and second regions) to provide multiple detection points while maintaining adequate spacing to reduce leakage current effects.
Solution Approach 2:
The frame-shaped alignment mark acts as an intermediary structure that provides a detectable step feature for optical alignment while being positioned in a third region separate from the interconnect regions. This intermediary mark enables precise alignment detection without directly interfering with the narrow interconnect spacing that causes leakage current.
2Manufacturing precision
If alignment marks are formed close to interconnects, then alignment precision is improved, but insulation breakdown voltage decreases
Solution Approach 1:
The alignment marking system is segmented into multiple components placed in different regions: standard alignment marks in first and second regions, and a frame-shaped alignment mark in a third region. This segmentation allows precise alignment detection while maintaining adequate insulation distance between marks and interconnects.
Solution Approach 2:
The frame-shaped alignment mark introduces a vertical dimension with a step feature that protrudes from the insulating film surface. This dimensional change provides enhanced optical detectability for alignment precision while the horizontal positioning in a separate third region maintains insulation breakdown voltage.
3Productivity
If interconnect spacing is reduced for high integration, then device density is improved, but leakage current increases
Solution Approach 1:
The frame-shaped alignment mark serves as an intermediary structure positioned in a third region separate from the high-density interconnect regions. It provides the necessary alignment detection function without being part of the narrow interconnect spacing, thereby enabling high device density while minimizing leakage current.
Solution Approach 2:
Different regions of the semiconductor device have different functional qualities: first and second regions contain standard alignment marks for general alignment, while the third region contains the frame-shaped alignment mark specifically for providing a detectable step feature. The interconnect regions maintain narrow spacing for high density with insulation protection, while alignment mark regions provide detection functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively reduces leakage current and increases insulation breakdown voltage by providing a precise alignment mechanism, improving the manufacturing yield and reliability of semiconductor devices with high-density interconnects.
Implementation Method 1
it is favorable to reduce the positional shift between the interconnects by using an alignment mark
Data Source
AI summary
According to one embodiment, a semiconductor device includes a semiconductor layer, an insulating film, a first interconnect, a conductor, and a frame-shaped portion. The insulating film is provided on the semiconductor layer. The first interconnect is provided on the insulating film. The conductor extends through the insulating film and electrically connects the semiconductor layer and the first interconnect. The frame-shaped portion extends through the insulating film and is provided in a second region different from a first region, the conductor being provided in the first region. The frame-shaped portion protrudes from a surface of the insulating film on which the first interconnect is provided.