Frame-Sliced Clock Prediction for GPU Power Management
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Solution Overview
Problem
Current power management schemes for computing systems are based on average behavior, leading to unnecessary power consumption or performance degradation during frame rendering.
Innovation Solution
A system management circuitry tracks computing activity during each frame, dividing it into time slices, and predicts clock frequencies for subsequent frames based on previous frame activity, allowing for dynamic power management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If power management is based on average behavior over multiple frames, then power consumption is reduced, but performance is compromised during high-demand phases
Solution Approach 1:
The patent segments the frame rendering process into distinct phases (triangle setup, rasterization, pixel shading, geometry processing) and applies different clock frequencies to each phase based on its power-performance characteristics. This allows the system to optimize power consumption during less demanding phases while maintaining high performance during critical phases, resolving the contradiction between power savings and performance.
Solution Approach 2:
The system dynamically adjusts clock frequencies during different phases of frame rendering rather than using a static average frequency. The frequency is increased during performance-critical phases and reduced during less demanding phases, enabling the system to adapt to instantaneous workload requirements and resolve the trade-off between power consumption and performance.
2Productivity
If clock frequency is increased to maintain performance during all phases, then performance is preserved, but power consumption increases unnecessarily
Solution Approach 1:
The patent applies different clock frequencies to different phases of the rendering pipeline based on their specific power-performance requirements. Critical phases like pixel shading receive higher frequencies to maintain performance, while less demanding phases receive lower frequencies to reduce power consumption, thus applying local quality optimization to resolve the contradiction.
Solution Approach 2:
The system changes the clock frequency parameter dynamically based on the current rendering phase. By adjusting this parameter according to instantaneous workload demands rather than maintaining a constant high frequency, the system preserves performance when needed while reducing power consumption during less demanding phases.
3Loss of energy
If conservative frequency selection is used to save power, then power consumption is reduced, but performance suffers during demanding phases
Solution Approach 1:
The patent implements periodic frequency adjustments synchronized with the rendering pipeline phases. Clock frequency is increased periodically during performance-critical phases and reduced during less demanding phases, creating a rhythmic pattern of high and low power states that maintains performance consistency while reducing overall power consumption.
Data Source
AI summary
Systems, apparatuses, and methods for implementing efficient power optimization in a computing system are disclosed. A system management unit configured to track computing activity of a computing device while processing each frame of a plurality of frames. The computing activity is tracked at least for a given period of time comprising a plurality of time slices. The system management unit further correlates a time slice associated with a given frame with a time slice associated with at least one previously processed frame from the plurality of frames, based at least in part on the tracked computing activity. The system management unit predicts a clock frequency to render the given frame, based at least in part on the correlation and renders the given frame using the predicted clock frequency.