Frame-Synced Error Injection Outside the FAS Region
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Solution Overview
Problem
Conventional error addition apparatuses fail to maintain frame synchronization when errors are added at a high rate, as they often insert errors into the Frame Alignment Signal (FAS) region, preventing accurate testing of error correction functions in target test apparatuses.
Innovation Solution
An error addition apparatus with an error addition regulation unit that receives a frame synchronization signal to regulate error bit placement, ensuring errors are added to positions other than the FAS region, using a gate signal generator and gate circuit to synchronize error addition with frame information and prevent interference with the FAS.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If errors are added at a high rate to the data signal, then the error correction function test coverage is improved, but frame synchronization is lost due to errors being added to the FAS region
Solution Approach 1:
The patent applies local quality by differentiating the treatment of different regions within the data signal. The FAS region is protected from error addition while other data regions can have errors added at high rates. This is achieved through the error addition regulation unit that identifies the FAS region based on frame synchronization signals and prevents error insertion in that specific local area, thereby maintaining frame synchronization while still enabling comprehensive error correction testing in other regions.
2Ease of manufacture
If errors are added without regulating the timing and position, then the error addition process is simple and fast, but the FAS region cannot be protected from errors
Solution Approach 1:
The patent applies preliminary action by establishing frame synchronization and identifying the FAS region position before the error addition process begins. The error addition regulation unit receives frame synchronization signals in advance to determine where the FAS region is located within each frame. This preliminary identification allows the system to subsequently protect the FAS region from error addition while maintaining a relatively simple and fast error addition process for the remaining data regions.
Data Source
AI summary
An error addition apparatus receives a data signal D having a frame format having a specific signal inserted into its front, adds errors to the data signal D, and outputs a resulting signal. The apparatus has an error addition regulation unit for receiving a frame synchronization signal F, indicative of a timing at which the front of the frame of the data signal has been inputted, and regulating the errors such that the errors are added to positions other than a region of the specific signal. Accordingly, errors are not added to a specific signal.