Framed Payload Error Correction Using Redundant Signal Permutations
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Solution Overview
Problem
Wireless communication systems employing diversity schemes face challenges in accurately identifying and correcting errors in redundant data frames, particularly when errors occur at different locations in multiple data streams, leading to inconsistencies that traditional error correction methods struggle to address effectively.
Innovation Solution
A frame error correction circuit is introduced that aligns data frames, performs bit-wise comparisons to identify inconsistent positions, and uses a permutation table to reassemble and validate data frames through CRC calculations, ensuring accurate error correction by comparing calculated error checking codes with original codes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error correction methods are used to handle redundant data frames, then the system complexity remains low, but the ability to accurately identify and correct errors at different locations in multiple data streams deteriorates
Solution Approach 1:
The error correction process is segmented into distinct functional blocks: alignment circuit (305) for synchronizing frames, comparison circuit (310) for identifying inconsistent bit positions, permutation circuit (315) for generating candidate corrections, and validation circuit (330) for verifying corrections using CRC. This segmentation allows each block to specialize in a specific task, improving overall error correction accuracy while managing complexity through modular design.
Solution Approach 2:
The patent introduces intermediate data structures including alignment markers, comparison result indicators, permutation tables, and validation buffers that mediate between the received redundant frames and the final corrected output. These intermediaries facilitate systematic error identification and correction across multiple data streams without requiring direct complex interactions between all frames simultaneously.
2Reliability
If bit-wise comparison and permutation assembly are performed to correct errors, then data integrity is improved, but the processing time and computational complexity increase
Solution Approach 1:
The alignment circuit performs preliminary synchronization of redundant data frames by identifying and aligning frame delimiters and headers before error correction begins. This preliminary alignment ensures that subsequent bit-wise comparisons occur at corresponding positions, preventing unnecessary processing of misaligned data and reducing overall correction time.
Solution Approach 2:
The comparison circuit focuses bit-wise comparison operations only on inconsistent bit positions identified through preliminary analysis, rather than examining all bits in all frames. The permutation circuit generates and validates only the necessary candidate corrections based on identified error patterns, performing partial action where full exhaustive search would be wasteful.
3Reliability
If multiple syndromes are combined for error correction, then the correction capability is enhanced, but the computational complexity and processing overhead increase
Solution Approach 1:
The patent merges multiple CRC validation results from different permuted versions of data frames into a single decision about which permutation represents the correct corrected data. Instead of maintaining separate complex correction paths for each syndrome, the system combines validation outcomes to select the single valid correction, reducing computational overhead while maintaining correction capability.
Data Source
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AI summary
A frame error correction circuit may identify and correct errors in data frames provided to a receiver as part of a diversity communications scheme. The frame error correction circuit may further align the data frames so that the data frames can be compared. The frame error correction circuit may perform a bit-wise comparison of the data frames and identify inconsistent bit positions where bits in the data frames differ from one another. Once inconsistent bit positions have been identified, the frame error correction circuit may access a permutation table of permutations of bits at the inconsistent bit positions. In some implementations, the frame error correction circuit uses the permutation table to reassemble permutations of the data frames. In various implementations, the frame error correction circuit performs a CRC of each permutation of the data frames, and provides a valid permutation to a network.