Free-Floating Metal Disk Packaging for Power Wafer Heat Dissipation
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Solution Overview
Problem
Existing high power semiconductor devices face challenges with inefficient heat dissipation, risk of wafer breakage, and potential device failure due to conductive particles on the junction termination.
Innovation Solution
A power semiconductor device design featuring a first metal disk with a lateral size equal to or larger than the semiconductor wafer, and a free floating interface between the metal disk and the wafer, which allows for efficient heat removal and reduces the risk of wafer breakage and particle generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the metal disk is firmly bonded to the semiconductor wafer to minimize wafer bowing, then wafer stability is improved, but the risk of generating conductive particles on the junction termination increases
Solution Approach 1:
The patent removes the bonding layer between the metal disk and semiconductor wafer, extracting the source of conductive particle generation. The metal disk is held in place by friction and geometric constraints rather than chemical bonding, eliminating the harmful effect of particle generation while maintaining wafer stability through alternative means.
Solution Approach 2:
The patent introduces a geometric intermediary - the stepped configuration of the metal disk with a first portion extending beyond the wafer edge and a second portion within the wafer - that mediates between the metal disk and wafer. This geometric constraint provides stability without requiring bonding, thus avoiding conductive particle generation.
2Adaptability or versatility
If different sized metal disks are used for top and bottom sides to accommodate press-pack geometry, then device adaptability is improved, but wafer breakage risk increases due to inhomogeneous pressure
Solution Approach 1:
The patent employs asymmetric design in the metal disk structure with a stepped configuration where the first portion extends beyond the wafer edge and the second portion is within the wafer. This asymmetric geometry allows different effective contact areas on top and bottom sides for press-pack compatibility while distributing pressure more uniformly across the wafer surface.
Solution Approach 2:
The metal disk is segmented into two distinct portions: a first portion extending beyond the wafer edge and a second portion within the wafer. This segmentation allows each portion to serve different functions - the first for geometric constraint and the second for pressure distribution - resolving the contradiction between adaptability and strength.
3Manufacturing precision
If metal disk lateral size is reduced to fit within wafer boundaries, then manufacturing precision is improved, but heat dissipation efficiency deteriorates
Solution Approach 1:
The patent extends the metal disk functionality into a third dimension by having the first portion extend beyond the wafer edge in the lateral direction. This dimensional extension provides additional surface area for heat dissipation without compromising the precision of the disk-wafer interface, as the extended portion does not require precise alignment with the wafer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design ensures efficient heat dissipation from the semiconductor wafer, particularly in the circumferential edge region, while minimizing the risk of wafer breakage and device failure due to conductive particles.
Implementation Method 1
a metal layer is sandwiched between the first metal disk and the semiconductor wafer, the metal layer having a melting point below 150°C
Implementation Method 2
an interface between the first metal disk and the semiconductor wafer is free floating
Implementation Method 3
The design ensures efficient heat dissipation from the semiconductor wafer, particularly in the circumferential edge region
Data Source
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AI summary
It is provided a power semiconductor device (100) comprising a semiconductor wafer (1) having a junction termination laterally surrounding at least one junction (15). A protection layer (18) covers the lateral side (13) of the semiconductor wafer (1) and a second main side (12) at least in an area (TR) of the junction termination. A first metal disk (2) is arranged on and covers a first main side (11) of the semiconductor wafer (1), wherein the first main side (11) is opposite to the second main side (12). The first metal disk (2) has a lateral size (d2) that is the same as or larger than a lateral size (dW) of the semiconductor wafer (1) to cover the first main side (11) of the semiconductor wafer (1). An interface between the first metal disk (11) and the semiconductor wafer (1) is a free floating interface.