Frequency Control Circuit With Stable Voltage for Low-Noise Mobile PLLs
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Solution Overview
Problem
Conventional phase-locked loops (PLLs) and delay-locked loops (DLLs) require large capacitors, consume high current, and are prone to power noise, making them unsuitable for mobile or hand-held electronic devices with limited resources and noise susceptibility.
Innovation Solution
A frequency control system comprising a power generating circuit with a series-connected up and down transistor circuit and a capacitor, generating a stable voltage, and a frequency generating circuit with a digital-to-analog converter, current source/sink circuit, and voltage-controlled oscillator, which reduces noise and power consumption by using transistors with high resistance to minimize circuit area and current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large capacitor is used to implement a filtering circuit in conventional PLL, then filtering performance is improved, but circuit area increases
Solution Approach 1:
The patent changes the fundamental parameters of the filtering approach by replacing a large capacitor-based RC filter with a switched capacitor filter that achieves equivalent or superior filtering performance using significantly smaller capacitor values through high-frequency switching, thus resolving the contradiction between filtering performance and circuit area
Solution Approach 2:
The patent substitutes the conventional passive RC filtering mechanism with an active switched capacitor filtering mechanism that uses digital switching elements to achieve the same filtering function with reduced area, effectively replacing the mechanical/passive approach with an active/digital one
2Reliability
If conventional PLL or DLL is implemented, then frequency control function is achieved, but power consumption increases
Solution Approach 1:
The patent employs periodic switching actions in the switched capacitor filters and charge pump circuits, where capacitors are charged and discharged in periodic cycles rather than continuous operation, significantly reducing average power consumption while maintaining frequency control functionality
Solution Approach 2:
The charge pump circuits automatically regulate the charging and discharging of capacitors based on phase error detection, creating a self-regulating system that minimizes power consumption by only performing active operations when frequency/phase adjustment is needed
3Reliability
If conventional PLL or DLL is implemented, then frequency control function is achieved, but susceptibility to power noise increases
Solution Approach 1:
The patent introduces switched capacitor filters as intermediary elements between the VCO and the rest of the circuit, which actively filter out power noise and stabilize voltages before they affect the frequency control function, thereby reducing susceptibility to power noise
4Area of stationary object
If transistors with high resistance are used to minimize circuit area, then circuit area decreases, but current consumption increases
Solution Approach 1:
The patent uses periodic switching of transistors in the switched capacitor filters, where transistors conduct current only during brief charging/discharging cycles rather than continuously, allowing the use of higher resistance transistors (smaller area) without proportionally increasing power consumption
Data Source
AI summary
A frequency control system includes a power generating circuit and a frequency generating circuit. The power generating circuit includes an up transistor circuit, a down transistor circuit and a capacitor for generating a stable voltage. The frequency generating circuit includes a digital-to-analog converter (DAC), a current source/sink circuit, a voltage-controlled oscillator (VCO) and a digital controller. The DAC receives the stable voltage as a power, the current source/sink circuit receives an analog signal from the DAC, the VCO receives a control voltage from the current source/sink circuit, and the digital controller receives a frequency signal from the VCO and a reference signal, according to which a digital signal is generated and fed to the DAC.


