Digital Frequency Divider Calibration for Oscillator Drift
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional oscillators face frequency drift due to process variations and temperature changes, making it challenging to achieve high frequency accuracy with complex analog control approaches, especially in advanced processes.
Innovation Solution
A clock generating apparatus comprising an oscillator and a frequency synthesizer with a fractional divider, phase control circuit, and sigma-delta modulator, which adjusts the frequency division factor based on process and temperature variations to generate a target clock signal with high accuracy and low jitter, eliminating the need for external crystal oscillators and simplifying the design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If analog control approach is used to adjust capacitor array of resonator, then frequency accuracy can be calibrated, but device complexity increases and sensitivity to PVT variation worsens
Solution Approach 1:
The patent replaces the analog control approach (mechanical/electrical adjustment of capacitor array) with a digital control approach. A frequency calibration circuit digitally adjusts the frequency division factor of a divider based on detected frequency deviation, thereby calibrating the output frequency without requiring complex analog components or adjustments.
Solution Approach 2:
The patent changes the control parameter from analog capacitor array adjustment to digital frequency division factor adjustment. By modifying the division factor digitally in response to frequency deviation detection, the system achieves frequency calibration with simpler circuitry and reduced sensitivity to process, voltage, and temperature variations.
2Measurement precision
If external crystal oscillators are used, then frequency accuracy is improved, but cost and device complexity increase
Solution Approach 1:
The patent extracts the frequency calibration function from the oscillator itself and implements it separately through a frequency calibration circuit. This allows the use of a simple RC oscillator instead of requiring external crystal oscillators, while still achieving accurate frequency control through digital adjustment of the divider's frequency division factor.
Solution Approach 2:
The patent creates a frequency calibration mechanism that copies the frequency adjustment capability traditionally provided by external crystal oscillators. Through digital control of the frequency division factor based on detected frequency deviation, the system replicates the frequency accuracy function without needing the physical crystal oscillator component.
3Measurement precision
If frequency drift calibration is implemented, then frequency accuracy is improved, but phase noise and jitter may worsen
Solution Approach 1:
The patent implements a feedback mechanism where a frequency detector continuously monitors the output frequency and provides feedback to a frequency calibration circuit. The calibration circuit adjusts the divider's frequency division factor in response to detected frequency deviation, creating a closed-loop system that maintains frequency accuracy while using simple RC oscillation to minimize inherent phase noise and jitter.
Data Source
AI summary
A clock generating apparatus includes an oscillator and a frequency synthesizer. The oscillator is utilized for generating a reference clock signal. The frequency synthesizer is coupled to the oscillator and utilized for synthesizing a target clock signal in accordance with the reference clock signal and a frequency division factor that has been adjusted or compensated, and outputting the target clock signal as an output of the clock generating apparatus.