Frequency Selection Circuit Using Divider Feedback for Fast Tuning
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Solution Overview
Problem
Existing frequency selective circuits require a long time to search for appropriate frequencies due to the presence of numerous capacitor arrays, leading to delays in meeting protocol requirements for dynamic switching.
Innovation Solution
A frequency selective circuit comprising a voltage-controlled oscillator, a frequency divider, a frequency selective unit, and a register group, where the clock frequency is converted from high to low frequency and compared with a reference frequency to find the corresponding low frequency, thereby reducing search time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If capacitor arrays are used for frequency selection, then frequency tuning capability is improved, but frequency search time increases
Solution Approach 1:
The patent introduces a frequency divider as an intermediary component between the VCO and the frequency selective unit. The frequency divider converts the high-frequency VCO output to a lower frequency, which is then compared with the reference frequency. This intermediary transformation enables faster frequency acquisition by operating at reduced frequencies while maintaining the ability to achieve the required frequency tuning capability through the relationship between divided frequency and reference frequency.
2Speed
If high frequency is used for clock signal, then protocol performance is improved, but frequency matching accuracy decreases
Solution Approach 1:
The frequency divider serves as a mediator that transforms the high-frequency clock signal into a lower frequency signal for accurate comparison with the reference frequency. This intermediary step allows the system to maintain high operating frequencies for protocol performance while achieving accurate frequency matching through the divided, lower-frequency comparison process.
Solution Approach 2:
The patent changes the frequency parameter by using a frequency divider to convert the high-frequency VCO output to a lower frequency. This parameter transformation enables accurate frequency matching at the lower divided frequency, which is then reflected back to determine the appropriate high-frequency setting for the VCO, thus achieving both high speed operation and precise frequency matching.
Data Source
AI summary
The present invention provides a frequency selective circuit, comprising: a voltage-controlled oscillator for outputting a frequency corresponding to the frequency adjustment window; a frequency divider for dividing the clock frequency output by the voltage-controlled oscillator, and feeding back the resulting low frequency to the frequency selection unit; a frequency selective unit for comparing a reference frequency with the resulting low frequency output by the frequency divider, and providing the frequency adjustment window which is configured based on the frequency search window to the voltage-controlled oscillator; a register group for outputting the frequency search window which is provided to the frequency selective unit. The embodiment of the present invention convert the clock frequency from a high frequency to a low frequency. The low frequency is compared with the reference frequency to ultimately find the corresponding low frequency that has the same frequency as the reference frequency.