Frequency Divider Phase Alignment Under Noise Instability
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Solution Overview
Problem
Frequency divider circuits face uncertainty in phase relationship between output clock signals due to noise-induced instability, leading to unpredictable phase relationships between frequency-divided clock signals.
Innovation Solution
A frequency divider circuit comprising a first and second frequency dividing circuit, a detection circuit to monitor phase relationships, and a selection circuit to output either the frequency-divided clock signal or its inverted version based on detected phase relationships, ensuring consistent phase alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a frequency divider circuit divides clock signals, then the frequency-divided clock signals are generated, but the phase relationship between the frequency-divided clock signals becomes uncertain due to noise-induced instability
Solution Approach 1:
The patent employs a detection circuit that monitors the phase relationship between frequency-divided clock signals and provides feedback to a selection circuit. When phase deviation is detected due to noise-induced instability, the selection circuit switches between different signal paths (including inverted signals) to restore the correct phase relationship, thereby maintaining reliability despite noise interference
Solution Approach 2:
The patent dynamically switches between different output configurations (normal and inverted signals) based on real-time phase detection. This dynamic adaptation allows the system to respond to noise-induced phase deviations and maintain stable phase relationships, transforming a static frequency divider into a dynamically adjustable phase-stabilized system
2Reliability
If the phase relationship uncertainty occurs in frequency divider circuits, then additional control mechanisms are needed, but the device complexity increases
Solution Approach 1:
The patent segments the frequency divider circuit into distinct functional modules: frequency dividing circuits, a detection circuit for monitoring phase relationships, and a selection circuit for switching between signal paths. This segmentation allows each module to perform its specific function independently, managing complexity through modular design while ensuring reliable phase relationship control
Solution Approach 2:
The patent introduces an intermediary detection circuit that mediates between the frequency-divided clock signals and the final output. This intermediary monitors phase relationships and triggers the selection circuit only when necessary, adding minimal complexity while effectively maintaining phase consistency through selective intervention rather than continuous complex control
Data Source
AI summary
A frequency divider circuit includes: a first frequency dividing circuit configured to divide a first clock signal to generate a first frequency-divided clock signal; a second frequency dividing circuit configured to divide a second clock signal having the same frequency as the first clock signal and having a first phase difference with respect to the first clock signal to generate a second frequency-divided clock signal; a detection circuit configured to detect a phase relationship between the first frequency-divided clock signal and the second frequency-divided clock signal; and a selection circuit configured to select and output one of the second frequency-divided clock signal and an inverted signal of the second frequency-divided clock signal which are generated by the second frequency dividing circuit, based on the phase relationship between the first frequency-divided clock signal and the second frequency-divided clock signal detected by the detection circuit.