Frequency Divider Circuit With Dynamic Flip-Flop Power Gating
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Solution Overview
Problem
Conventional frequency dividers in Phase-Locked Loop (PLL) circuits consume high power due to their high operating speed, which limits their efficiency and speed, especially when transitioning between different division modes.
Innovation Solution
A frequency divider circuit design that disconnects the first flip-flop from the voltage source during 2-division mode and extends the logic high signal by one additional clock cycle during 3-division mode, eliminating the need for a logical OR gate and reducing power consumption by using a control module and phase inverter with specific transistor configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the first flip-flop is continuously connected to the voltage source to maintain high operating speed, then the operating speed is improved, but the power consumption increases
Solution Approach 1:
The patent applies dynamic control by selectively connecting or disconnecting the first flip-flop from the voltage source based on the division mode. In 2-division mode, the first flip-flop is disconnected to save power, while in 3-division mode, it is connected to maintain the required operating speed. This dynamic switching resolves the contradiction between continuous high speed and power consumption.
Solution Approach 2:
The patent changes the operational parameters of the first flip-flop by controlling its connection state to the voltage source through a control module. The flip-flop switches between active (connected) and inactive (disconnected) states, thereby adjusting power consumption parameters while maintaining necessary performance characteristics for different division modes.
2Reliability
If conventional frequency divider design is used with continuous voltage supply, then reliable operation is ensured, but power consumption is high
Solution Approach 1:
The patent implements dynamic power management where the first flip-flop's connection to the voltage source is controlled based on division mode requirements. The control module ensures reliable operation by connecting the flip-flop only when needed (3-division mode), while disconnecting it during 2-division mode to reduce power consumption, thus maintaining reliability while improving energy efficiency.
3Use of energy by moving object
If the first flip-flop is disconnected during 2-division mode to reduce power consumption, then power consumption is reduced, but the circuit complexity increases due to control module
Solution Approach 1:
The patent introduces a control module as an intermediary component that manages the connection between the first flip-flop and the voltage source. This control module, implemented with simple transistor switches, adds minimal complexity while enabling significant power savings by selectively disconnecting the flip-flop during 2-division mode based on control signals.
Data Source
AI summary
A frequency divider circuit and a frequency synthesizer circuit are presented, comprising:first and second flip-flops;a phase inverter, wherein an output electrode of the first flip-flop is connected to an input electrode of the second flip-flop and an output electrode of the phase inverter, an output electrode of the second flip-flop is connected to an input electrode of the phase inverter and an input electrode of the first flip-flop, a control electrode of the phase inverter is connected to a control signal; anda control module, wherein the first flip-flop is connected to a voltage source through the control module, the control module is connected to the control signal and controls the connection between the first flip-flop and the voltage source. When the control signal is a first-mode signal, the first flip-flop is disconnected from the voltage source, providing a functionality of a N-division frequency divider. When both the control signal and an output signal of the second flip-flop are a second-mode signal, a functionality of a N+1-division frequency divider is provided.