Variable Frequency Divider Setting Updates for Stable Ratio Switching

Solution Overview

Problem

Conventional variable frequency dividers experience erroneous operations when the frequency dividing ratio setting data reduces the number of valid dual modulus frequency dividers contributing to the frequency dividing operation, particularly when the last stage divider's ratio is 3, leading to inconsistent frequency dividing ratios.

Innovation Solution

The variable frequency divider updates setting data in synchronization with the frequency divided signal from the last stage dual modulus frequency divider receiving a non-significant reset signal, ensuring normal operation even when the number of valid dividers is decreased.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of valid dual modulus frequency dividers is reduced to support smaller frequency dividing ratios, then the frequency dividing ratio range is improved, but erroneous operation occurs when the last stage divider's ratio is 3

Engineering Contradiction:

Improvefrequency dividing ratio rangeVSAvoidoperation stability

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies preliminary action by initializing the internal state of frequency divider circuits before they are invalidated. Specifically, when a frequency divider is about to be invalidated (when its output signal level indicates invalidation), the control signal generation circuit proactively generates an initialization signal to reset the internal state of that frequency divider. This preliminary initialization prevents erroneous operations that would occur when the divider is later revalidated, ensuring smooth transitions as dividers are dynamically added or removed from the valid set.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through the control signal generation circuit that continuously monitors the output signal levels of frequency dividers and dynamically adjusts initialization signals accordingly. When a frequency divider's output indicates it should be invalidated, the feedback mechanism triggers an initialization signal to reset its internal state. This feedback loop ensures that the system maintains reliable operation while adapting the frequency dividing ratio by adding or removing valid dividers from the chain.

Inventive Principle:

Principle #23Feedback

2Adaptability or versatility

If frequency dividing ratio setting data is updated dynamically to change the number of valid dividers, then the frequency dividing ratio is improved, but inconsistent frequency dividing ratios occur due to uninitialized internal states

Engineering Contradiction:

Improvefrequency dividing ratioVSAvoidfrequency dividing ratio accuracy

Core Design Contradiction:

Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by initializing the internal state of frequency divider circuits before they are invalidated. Specifically, when a frequency divider is about to be invalidated (when its output signal level indicates invalidation), the control signal generation circuit proactively generates an initialization signal to reset the internal state of that frequency divider. This preliminary initialization prevents erroneous operations that would occur when the divider is later revalidated, ensuring smooth transitions as dividers are dynamically added or removed from the valid set.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through the control signal generation circuit that continuously monitors the output signal levels of frequency dividers and dynamically adjusts initialization signals accordingly. When a frequency divider's output indicates it should be invalidated, the feedback mechanism triggers an initialization signal to reset its internal state. This feedback loop ensures that the system maintains reliable operation while adapting the frequency dividing ratio by adding or removing valid dividers from the chain.

Inventive Principle:

Principle #23Feedback

Data Source

PatentEP3419177B1Variable frequency divider

Publication Date: 2020.07.01 MITSUBISHI ELECTRIC CORP

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AI summary

A setting data output circuit (3) is configured to update setting data in synchronization with a frequency divided signal output from a dual modulus frequency divider on a last stage out of the dual modulus frequency dividers to which a non-significant reset signal is output from a reset circuit (6) which are included in a plurality of dual modulus frequency dividers (1-1 and 1-2) in a first frequency divider group (1). As a result, when a frequency dividing ratio of the dual modulus frequency divider on the last stage out of valid dual modulus frequency dividers contributing to frequency dividing operation is 3, it is possible to realize normal frequency dividing operation even in a case in which frequency dividing ratio setting data to decrease the number of valid dual modulus frequency dividers contributing to the frequency dividing operation is provided.