Frequency-Domain Channel Compliance Model for High-Speed Bus Verification

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current methods for determining channel compliance in high-speed communication bus systems, such as those above 16 Gb/s, are complex and time-consuming, requiring expertise in time-domain simulations and involving numerous equalization settings, which can be inefficient and resource-intensive.

Innovation Solution

A frequency-domain channel compliance model is developed using genetic algorithms to simulate and identify boundary sets of frequency domain parameters, allowing for quicker and less resource-intensive compliance testing by comparing channel parameters to pre-defined compliant sets, reducing the need for extensive time-domain analysis.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If time-domain simulations with multiple equalization settings are used to determine channel compliance, then compliance accuracy is improved, but computational time and resource consumption increase significantly

Engineering Contradiction:
Improvecompliance accuracyVSAvoidcomputational time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent transforms the compliance verification from time-domain to frequency-domain by changing the parameter space. Instead of simulating time-domain waveforms with multiple equalization settings, the method uses frequency-domain parameters (insertion loss, signal-to-crosstalk ratio) as descriptors to represent channel compliance, enabling faster verification without sacrificing accuracy

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a simplified model (compliance model) that copies the essential compliance characteristics of complex time-domain simulations. The compliance model uses frequency-domain parameter boundaries to represent the results of complex time-domain simulations with multiple equalization settings, allowing quick verification without re-running the complex simulations

Inventive Principle:
Principle #26Copying

2Measurement precision

If extensive time-domain simulations with multiple equalization settings are performed, then compliance verification accuracy is improved, but computational resource consumption increases

Engineering Contradiction:
Improvecompliance verification accuracyVSAvoidcomputational resource consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent changes the computational approach from time-domain to frequency-domain parameter analysis. By using frequency-domain parameters (insertion loss, signal-to-crosstalk ratio) as descriptors and establishing compliance boundaries in this parameter space, the system reduces computational resource consumption while maintaining verification accuracy

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent performs preliminary analysis to establish compliance boundaries and models before actual verification. By pre-calculating and storing the compliance boundaries in frequency-domain parameter space, the system avoids repeating extensive time-domain simulations during each verification process, thereby reducing computational resource consumption

Inventive Principle:
Principle #10Preliminary action

3Productivity

If frequency-domain parameter comparison is used for compliance testing, then testing speed is improved, but the complexity of establishing accurate boundary sets increases

Engineering Contradiction:
Improvetesting speedVSAvoidcompliance model establishment complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent uses compliance models that copy and store the essential compliance characteristics derived from time-domain simulations. These models represent the complex relationships between channel parameters and compliance outcomes, allowing fast frequency-domain verification while encapsulating the complexity of model establishment in pre-computed boundary sets

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent introduces frequency-domain parameters as intermediary descriptors between the physical channel characteristics and compliance verification. These parameters (insertion loss, signal-to-crosstalk ratio) serve as mediators that simplify the verification process while capturing the essential compliance information, reducing the direct complexity of analyzing full time-domain waveforms

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9638750B2Frequency-domain high-speed bus signal integrity compliance model
Publication Date: 2017.05.02 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US9638750B2 patent drawing
  • US9638750B2 patent drawing
  • US9638750B2 patent drawing

AI summary

Embodiments of the present disclosure provide apparatus for using a compliance model to determine compatibility of a channel with a bus's chip I/O circuitry at its ends. The apparatus includes at least one processor and a memory coupled to the at least one processor. The processor is configured to: identify at least one design criteria; obtain boundary sets of frequency domain parameters for compliant signal channels known to achieve the design criteria; and verify whether a particular signal channel is compliant by comparing values of frequency domain parameters for the particular channel to one or more of the boundary sets of frequency domain parameters for the known compliant channels.