Frequency Domain Interference Cancellation Using Segmented Transform
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Solution Overview
Problem
Current full duplex Ethernet communication systems face significant circuit complexity and power consumption due to the need for different filter lengths to simulate echo and near-end cross talk (NEXT) interference, leading to inefficient computation and increased costs.
Innovation Solution
The proposed solution involves performing interference cancellation and channel equalization in the frequency domain, using a time-domain processing module to shape the transmitted signal and divide it into groups, allowing for a smaller bit number representation and shared transforming circuitry, which reduces computation complexity and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If different filter lengths are used to simulate echo and NEXT interference, then the interference cancellation accuracy is improved, but the circuit complexity and power consumption increase
Solution Approach 1:
The received data is divided into several groups, and the transforming computation is performed on each group separately. This segmentation reduces the size of the transforming computation from handling all data at once to handling smaller subsets, thereby reducing circuit complexity while maintaining interference cancellation accuracy through grouped processing
Solution Approach 2:
A shared transforming circuit is designed to handle multiple interference types (both echo and NEXT) by processing divided data groups. This universal circuit eliminates the need for separate dedicated circuits for each interference type, reducing overall circuit complexity while maintaining the ability to cancel different interference signals accurately
2Measurement precision
If different filter lengths are used to simulate echo and NEXT interference, then the interference cancellation accuracy is improved, but the power consumption increases
Solution Approach 1:
By segmenting the received data into groups and performing transforming computation on each group separately, the computational load per time step is reduced. This leads to lower power consumption while maintaining accurate interference cancellation through systematic grouped processing
Solution Approach 2:
The patent implements a caching mechanism where previously computed transforming results are stored and reused when appropriate. This discards redundant computations and recovers useful results from previous processing, reducing overall power consumption while maintaining cancellation accuracy
3Measurement precision
If a large number of taps are used in the filter, then the interference simulation accuracy is improved, but the length problem of the interference cancellation module increases
Solution Approach 1:
The data is divided into groups for transforming computation, which effectively manages the length of the interference cancellation module by processing smaller subsets. This maintains simulation accuracy through systematic grouping while controlling module length through divided processing
4Measurement precision
If separate transforming circuits are used for different interference types, then the interference cancellation accuracy is improved, but the cost increases
Solution Approach 1:
A shared transforming circuit is designed to handle multiple interference types by processing divided data groups. This universal approach maintains cancellation accuracy through proper grouping and processing while significantly reducing cost by eliminating the need for multiple separate transforming circuits
Data Source
AI summary
An apparatus for channel interference cancellation includes a first interference-cancellation module and a first cancellation-signal generating circuit. The first interference-cancellation module comprises a first processing circuit including a grouping circuit and a first transforming circuit. The grouping circuit divides received data into a plurality of groups of first sub-data. The first transforming circuit sequentially transforms the groups of first sub-data from a first domain to a second domain to generate a plurality of groups of first transformed sub-data. The first cancellation-signal generating circuit comprises a delay unit, a first processing unit and a second processing unit. The delay unit sequentially delays the groups of first transformed sub-data to generate a plurality of groups of delayed sub-data. The first and the second processing unit output a first and a second processed signal according to the groups of first transformed sub-data and the groups of delayed sub-data respectively.


