Frequency Error Detection Using Single Conversion Circuit

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Solution Overview

Problem

Existing frequency error detection apparatuses in DTMB receivers require multiple frequency conversion circuits due to varying frame header lengths, leading to increased circuit scale and complexity.

Innovation Solution

A frequency error detection apparatus with a known signal extraction circuit, distributing arrangement circuits, frequency conversion circuits, delay detection circuits, and a peak detection circuit, which extracts and frequency-converts a known signal, performs correlation operations, and calculates frequency errors using a single frequency conversion circuit, regardless of the frame header length.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple frequency conversion circuits are used to handle different frame header lengths, then frequency error detection accuracy is maintained, but circuit scale and complexity increase

Engineering Contradiction:
Improvefrequency error detection accuracyVSAvoidcircuit scale
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent makes a single frequency conversion circuit capable of handling multiple frame header lengths (420, 595, and 945 symbols) by configuring it to process different known signal lengths through software control rather than hardware multiplication. This universal approach maintains frequency error detection accuracy across all DTMB broadcast modes while avoiding the need for separate frequency conversion circuits for each frame type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the operational parameters of the frequency conversion circuit based on the detected frame type. By adjusting the known signal length parameter according to the three broadcast modes, the same hardware circuit can adapt to different frame header lengths, thereby maintaining measurement precision without increasing circuit scale.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If a single frequency conversion circuit is used for all frame types, then circuit scale is reduced, but handling different frame header lengths becomes more complex

Engineering Contradiction:
Improvecircuit scaleVSAvoidhandling different frame header lengths
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent introduces dynamic adaptability to the single frequency conversion circuit by making its operation dependent on the detected frame type. The circuit dynamically adjusts its processing parameters based on whether the incoming frame has a 420, 595, or 945 symbol header, allowing one circuit to perform the work of multiple static circuits while reducing overall hardware complexity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent performs preliminary frame type detection before frequency conversion processing. By identifying the frame header length in advance, the system can pre-configure the single frequency conversion circuit with the appropriate known signal length parameter, ensuring efficient and accurate processing without requiring multiple dedicated circuits for each frame type.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8581570B2Frequency error detection apparatus
Publication Date: 2013.11.12 KK TOSHIBA
  • US8581570B2 patent drawing
  • US8581570B2 patent drawing
  • US8581570B2 patent drawing

AI summary

Embodiments are provided: a known signal extraction circuit a distributing arrangement circuit which distributes a known signal in a fixed section; a frequency conversion circuit which causes the distributed output to be a frequency-domain signal; a delay detection circuit which determines an amount of phase variation between adjacent frequency components in the frequency-domain signal; a distributing arrangement circuit which distributes a signal of the same sequence as the known signal described above in a fixed section; a frequency conversion circuit which causes the distributed output to be a frequency-domain signal; a delay detection circuit which determines an amount of phase variation between adjacent frequency components in the frequency-domain signal; a correlation operation circuit which obtains a correlation value between two delay detection outputs; and a peak detection circuit which detects one or more high power peaks among the correlation values and obtain frequency difference from a reference value.