Frequency Generator With LMS-Calibrated DCO for Zero-Lock Hopping
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Solution Overview
Problem
Conventional analog phase-locked loops (PLLs) are prone to errors and require complex recalibration during frequency hopping, leading to inefficiencies in digital radio communications, while existing digital PLL calibration techniques lack precision and efficiency.
Innovation Solution
An all-digital phase-locked loop (ADPLL) with a Least Mean Squares (LMS)-based calibration unit iteratively calibrates the gain of a digitally controlled oscillator (DCO) using a filtered phase error, allowing for precise estimation and tracking of the DCO gain, enabling fast and accurate frequency hopping without repeated close-loop locking processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional analog PLL is used, then frequency generation is achieved, but errors and error propagation occur due to analog operations and elements
Solution Approach 1:
The patent replaces the analog PLL system with a digital PLL system, substituting analog operations and elements with digital counterparts. Specifically, the analog phase detector is replaced with a digital phase detector, the analog loop filter is replaced with a digital loop filter, and the analog VCO is replaced with a digitally controlled oscillator (DCO). This substitution eliminates errors and error propagation associated with analog operations while maintaining frequency generation functionality.
Solution Approach 2:
The patent changes the operating domain from analog to digital by introducing a digital control word that digitally controls the oscillator frequency. The phase detector output is converted to a digital error signal, and the loop filter operates in the digital domain. This parameter change from analog continuous signals to digital discrete signals fundamentally resolves the reliability issues of analog PLLs.
2Adaptability or versatility
If conventional PLL recalibration is performed during frequency hopping, then frequency switching is achieved, but recalibration time and power consumption increase
Solution Approach 1:
The patent implements preliminary calibration of the DCO at power-up or initialization, establishing a calibration factor that is stored and reused during frequency hopping operations. This preliminary action eliminates the need for repeated recalibration during frequency hops, significantly reducing recalibration time and power consumption while maintaining frequency hopping capability.
Solution Approach 2:
The patent employs a feedback mechanism where the digital phase detector continuously monitors the phase difference between the VCO output and reference clock, and the digital loop filter adjusts the DCO control word in real-time to maintain lock. This feedback system enables fast frequency hopping by automatically correcting phase errors without requiring full recalibration, reducing both time and power consumption.
3Measurement precision
If existing digital PLL calibration techniques are used, then DCO gain calibration is achieved, but precision and efficiency are insufficient
Solution Approach 1:
The patent implements a self-calibration mechanism where the system automatically calibrates the DCO gain by measuring the actual frequency output and adjusting the calibration factor accordingly. The digital phase detector and loop filter work together to automatically detect and correct gain errors without external intervention, improving both precision and efficiency of the calibration process.
Solution Approach 2:
The patent replaces traditional analog calibration methods with digital measurement and adjustment techniques. The digital phase detector provides precise digital measurements of phase and frequency errors, and the digital loop filter implements precise digital adjustments to the DCO control word. This digital substitution significantly improves calibration precision and efficiency compared to analog methods.
Data Source
AI summary
A frequency generator is disclosed. The frequency generator is for generating an oscillator clock according to a reference clock, and the frequency generator is used in a frequency hopping system that switches a carrier frequency among a plurality of channels, and the carrier frequency further carries a modulation frequency for data transmission. The frequency generator includes: a frequency hopping and modulation control unit, arranged for generating a current channel according to a channel hopping sequence and a frequency command word (FCW) based on the reference clock, a digital-controlled oscillator (DCO), arranged for to generating the oscillator clock according to an oscillator tuning word (OTW) obtained according to the estimated DCO normalization value. An associated method is also disclosed.