Frequency Multiplexing Clock Signal Mode Switching
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Solution Overview
Problem
Serializer/deserializer designs often become pin limited, requiring efficient use of wires and pins in handheld devices, where increasing the number of wires or reducing their size compromises reliability.
Innovation Solution
The solution involves multiplexing functions by changing clock frequencies to indicate mode changes, allowing a single wire to carry different signals over time, reducing the need for additional pins and wires by using frequency detection to switch between modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of wires and pins is increased to provide necessary functions, then functional capability is improved, but reliability deteriorates due to larger flex circuit or smaller wires
Solution Approach 1:
The patent applies multi-functionality by enabling a single wire to carry multiple different signals at different times through frequency-division multiplexing. The clock line is used to transmit both clock signals and mode control signals by varying the frequency, allowing one physical connection to serve multiple functional purposes and reduce the total number of wires needed
Solution Approach 2:
The patent changes the frequency parameter of the clock signal to encode different modes of operation. By modulating the clock frequency between different values (e.g., first frequency for normal operation, second frequency for mode change), the system transmits control information without requiring additional dedicated control pins, thus reducing wire count while maintaining functional capability
2Reliability
If the number of pins is reduced to improve reliability, then reliability is improved, but device complexity increases due to multiplexing requirements
Solution Approach 1:
The patent implements feedback mechanisms where the receiving end detects the clock frequency to determine the current mode and automatically adjusts its operation accordingly. This feedback loop allows the system to respond to frequency changes without requiring complex external control logic, managing the complexity through intelligent signal processing rather than additional hardware
3Adaptability or versatility
If frequency detection is added to enable mode changes, then adaptability is improved, but device complexity increases due to frequency detection circuitry
Solution Approach 1:
The system uses the existing clock signal infrastructure to carry mode information, allowing the clock line to serve dual purposes: timing operations and mode control. The frequency detection capability is integrated into the existing receiver architecture, enabling the system to self-determine its operational mode from the clock signal characteristics without requiring separate dedicated control circuits
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the number of wires and pins required, enhancing reliability and allowing real-time monitoring with protection against electromagnetic interference, while maintaining the original intent of the frequency signal.
Implementation Method 1
the clock frequency may be changed and detected, and the change may, for example, go to another frequency or zero frequency
Data Source
AI summary
A system and process for eliminating a control wire between logic systems that communicate with each other. In one embodiment, a system sends to a receiver a frequency that indicates a first mode. In the first mode a first data type may be sent. When the frequency is changed a second mode is indicated wherein a second data type may be sent. The receiver detects the frequency change and assumes the first or second mode as indicated.