Negative-Resistance Frequency Multiplier for Resonant Cavity Loss
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Solution Overview
Problem
Existing frequency multipliers face challenges in balancing bandwidth, energy efficiency, and power consumption, particularly due to energy loss in resonant cavities and issues like injection locking and high power supply voltage.
Innovation Solution
A frequency multiplier design incorporating a negative resistance unit formed by a feedback capacitor and parasitic capacitor to supplement energy loss in resonant cavities, combined with cross-coupled switching transistors to reduce common-mode interference and injection locking, and an inductor to increase voltage, thereby optimizing energy efficiency and bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a conventional frequency multiplier is used to multiply frequency and generate high-frequency carrier, then the frequency multiplication function is achieved, but energy loss in the resonant cavity increases and energy efficiency deteriorates
Solution Approach 1:
The patent converts the harmful energy loss in the resonant cavity into a beneficial effect by introducing a negative resistance unit. This unit uses the parasitic capacitance of existing transistors combined with feedback capacitors to generate negative resistance that compensates for the resonant cavity's energy loss, transforming the problem of energy dissipation into a mechanism for energy compensation and improved efficiency
Solution Approach 2:
The patent implements feedback mechanisms through feedback capacitors connected to the parasitic capacitance of transistors. The feedback network samples the output signal and feeds it back to the input through the parasitic capacitance, creating a regenerative effect that compensates for energy loss in the resonant cavity and improves overall energy efficiency of the frequency multiplier
2Power
If the resonant cavity is used for frequency multiplication, then the frequency output is achieved, but the power consumption increases
Solution Approach 1:
The patent enables the frequency multiplier circuit to compensate for its own energy loss using internally available resources. The parasitic capacitance of the transistors, which is normally a source of loss, is utilized as a key component of the negative resistance unit. This self-service approach allows the circuit to generate the necessary negative resistance without requiring external active components or additional power consumption, thereby maintaining productivity while reducing overall power consumption
3Adaptability or versatility
If conventional frequency multiplication is implemented, then the frequency output is achieved, but the bandwidth is limited
Solution Approach 1:
The patent introduces dynamic characteristics to the frequency multiplier by using the parasitic capacitance of transistors in conjunction with feedback capacitors. This creates a dynamically adjustable negative resistance that can adapt to different operating conditions, thereby expanding the bandwidth of the frequency multiplier while maintaining stable frequency multiplication performance across a wider frequency range
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design improves energy efficiency, reduces power consumption, and enhances signal quality by suppressing noise and increasing bandwidth, ensuring stable resonance and efficient operation.
Implementation Method 1
The resonant cavity performs resonant amplification on one of the plurality of harmonic components, to obtain the intrinsic signal
Implementation Method 2
The negative resistance unit includes a feedback capacitor and a parasitic capacitor. The feedback capacitor and the parasitic capacitor collectively provide negative resistance for the resonant cavity
Implementation Method 3
The inductor is electrically connected between the harmonic generator and the oscillator. The inductor is disposed between the oscillator and the harmonic generator, to increase a voltage of the harmonic signal
Data Source
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AI summary
This application provides a frequency multiplier, including an oscillator and a harmonic generator. The oscillator includes a resonant cavity and a negative resistance unit. The harmonic generator is configured to generate a harmonic signal based on an input fundamental frequency signal. The oscillator is electrically connected to the harmonic generator, and is configured to receive the harmonic signal, and output an intrinsic signal by using the resonant cavity. A frequency of the intrinsic signal is a multiple of a frequency of the fundamental frequency signal. The negative resistance unit includes a feedback capacitor and a parasitic capacitor. The feedback capacitor and the parasitic capacitor collectively provide negative resistance for the resonant cavity. This application further provides a wireless communication device. Therefore, according to the frequency multiplier and the wireless communication device provided in this application, energy efficiency of the frequency multiplier may be improved, thereby optimizing a balance between bandwidth, energy efficiency, and power consumption of the frequency multiplier.