Multi-Transition Frequency Multiplier for Stable DVFS Clock Switching
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Solution Overview
Problem
Abrupt changes in clock frequency during dynamic voltage and frequency scaling (DVFS) can cause undesirable disruptions, such as timing failures due to supply voltage perturbations, leading to system instability.
Innovation Solution
A frequency multiplier circuit with a programmable transition controller that controls the transitioning frequency relationship between a first signal frequency and a desired second signal frequency, using a pre-multiplier circuit, comparison circuitry, and a programmable loop filter to generate a control signal for a frequency generation circuit, thereby minimizing perturbations and improving system settling time and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the clock frequency is increased quickly to improve performance, then the system performance is improved, but the supply voltage undershoots causing timing failures
Solution Approach 1:
The frequency multiplier circuit performs preliminary frequency multiplication on the reference clock signal before it is used by the system. By pre-multiplying the frequency in controlled steps rather than making abrupt changes, the system can transition to higher frequencies while maintaining supply voltage stability, thus avoiding timing failures while still achieving performance improvement.
2Use of energy by moving object
If the clock frequency is decreased quickly to conserve power, then the power consumption is reduced, but the supply voltage overshoots causing system instability
Solution Approach 1:
The frequency multiplier circuit enables preliminary and controlled frequency adjustment before full power reduction is implemented. By gradually stepping down the multiplied frequency rather than making abrupt reductions, the load current decreases smoothly, preventing supply voltage overshoot and maintaining system stability during power conservation operations.
3Speed
If abrupt frequency changes are made to respond to varying workloads, then the dynamic response is improved, but perturbations cause the system to become unusable until voltage settles
Solution Approach 1:
The frequency multiplication process is segmented into discrete, controlled steps rather than being implemented as a single abrupt change. The frequency multiplier circuit divides the frequency transition into multiple intermediate stages, each with manageable load current changes, allowing the system to respond dynamically to workload variations while minimizing perturbations and maintaining continuous usability throughout the transition.
Data Source
AI summary
A frequency multiplier system includes a first frequency multiplier circuit to generate a first signal having a first frequency. The first frequency multiplier circuit includes a first post-divider circuit to divide the first frequency of the first signal to a first output frequency within a bounded first range of frequencies, and a first programmable frequency transition controller to control a transitioning frequency relationship between the first signal having the first frequency and a target signal having a desired target frequency. The system includes a second frequency multiplier circuit to generate a second signal having a second frequency. The second frequency multiplier circuit includes a second post-divider circuit configured to divide the second frequency of the second signal to a second output frequency within a bounded second range of frequencies, and a second programmable frequency transition controller to control a transitioning frequency relationship between the second signal having the second frequency and the target signal having the desired target frequency. A multi-transition controller is coupled to both the first frequency multiplier circuit and the second frequency multiplier circuit to, upon a desired change from the first output frequency to the target output frequency, select one of the first output frequency or the second output frequency as a system output frequency.