Frequency Multiplier Jitter Correction Using Feedforward Phase Error
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Solution Overview
Problem
Existing frequency multiplier systems face limitations in correcting phase noise due to the limited bandwidth of feedback loops and the need for frequent phase comparisons, which restricts the accuracy and stability of the sampling clock for analog-to-digital converters, especially when the output frequency is significantly higher than the reference frequency.
Innovation Solution
A method is introduced to estimate the instantaneous phase error of a frequency multiplier's output clock and apply digital phase error corrections in a feedforward manner, comparing the frequency multiplier output to a reference signal at multiple instances within a reference signal period, allowing for improved phase noise correction and enhanced stability of the sampling clock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If feedback loop bandwidth is increased to correct phase noise more frequently, then phase noise correction improves, but system stability deteriorates
Solution Approach 1:
The patent segments the phase noise correction function into two independent parts: (1) a wideband feedforward path that processes phase error measurements without stability constraints, and (2) a narrowband feedback path that maintains system stability. This segmentation allows each path to be optimized independently for its specific function.
Solution Approach 2:
The patent introduces an intermediary measurement path that samples the reference signal and measures phase errors independently of the feedback loop. This intermediary measurement system provides accurate phase noise data without being constrained by feedback loop stability requirements.
2Measurement precision
If phase comparisons are made more frequently, then sampling clock accuracy improves, but device complexity increases
Solution Approach 1:
The system uses the existing reference signal and ADC infrastructure to perform self-measurement of phase errors. The reference signal itself serves as the measurement probe, eliminating the need for separate expensive phase measurement equipment.
Solution Approach 2:
The patent changes the measurement parameter from direct time-domain phase comparison to frequency-domain analysis through spectral estimation. This allows accurate phase noise measurement at multiple effective rates without proportionally increasing hardware complexity.
3Speed
If output frequency is increased significantly above reference frequency, then frequency multiplication capability improves, but phase noise accumulates
Solution Approach 1:
The patent performs preliminary measurement of phase errors using the reference signal before the frequency multiplication process amplifies them. By measuring and correcting phase errors at the lower reference frequency, the system prevents multiplication of phase noise.
Solution Approach 2:
The patent implements a hybrid feedback system where measured phase errors from the reference signal are used to generate correction signals that are applied to the frequency multiplier output, creating a feedback mechanism that operates effectively despite the frequency multiplication.
Data Source
AI summary
A system and method are provided for frequency multiplication jitter correction. The method accepts an analog reference signal having a first frequency, and using the analog reference signal, derives a system clock signal having a second frequency, greater than the first frequency. A PLL using a voltage controlled oscillator (VCO) is one example of a frequency multiplier. The method samples the amplitude of the analog reference signal using the system clock signal and converts the sampled analog reference signal into a digitized reference signal. In response to comparing the digitized reference signal to an ideal digitized reference signal, the phase error correction for the system clock signal is derived. The phase error correction at a first instance of time can be applied to the digitized data signal, previously converted from an analog data signal sampled at a first instance of time with the system clock signal.