Frequency Multiplier Linearization Under Bandwidth Constraints

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Frequency multipliers introduce significant nonlinear distortion, necessitating high-speed digital-to-analog converters and broader bandwidth requirements, which are challenging to implement due to high power consumption and system complexity, especially for vector-modulated signals.

Innovation Solution

A baseband processor configured to process an algorithm for linearizing frequency multipliers under constrained transmitter and receiver bandwidths, using direct and indirect learning DPD modules to estimate predistortion function coefficients, reducing the required ADC sampling rate and DAC sampling speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If frequency multipliers are used to generate high-frequency RF signals, then carrier frequency capability exceeds transistor fmax, but nonlinear distortion of the FX output signal increases significantly

Engineering Contradiction:
Improvecarrier frequencyVSAvoidnonlinear distortion
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent applies digital predistortion (DPD) to convert the harmful nonlinear distortion generated by frequency multipliers into a beneficial correction mechanism. By intentionally pre-distorting the input signal with the opposite characteristics of the multiplier's nonlinearity, the system compensates for and cancels out the harmful distortion at the output, thereby maintaining signal quality while enabling operation above transistor fmax

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent implements predistortion processing before the signal enters the frequency multiplier. The DPD algorithm calculates and applies correction coefficients in advance to pre-compensate for the expected nonlinear distortion, so that when the signal passes through the frequency multiplier, the distortion is already counteracted, resulting in a linearized output signal

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If high-speed digital-to-analog converters are used to compensate for nonlinear distortion, then signal quality improves, but power consumption and system complexity increase

Engineering Contradiction:
Improvesignal qualityVSAvoidsystem complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent changes the operational parameters of the digital predistortion system by implementing adaptive coefficient updating mechanisms. The DPD coefficients are dynamically adjusted based on feedback from the actual frequency multiplier output, allowing the system to maintain high signal quality with optimized computational parameters rather than requiring excessively high-speed converters throughout the entire signal chain

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements a feedback loop where the output of the frequency multiplier is captured and fed back to the baseband processor. This feedback signal is used to continuously update and refine the predistortion coefficients, enabling the system to adapt to changing conditions and maintain optimal linearization performance without requiring overly complex high-speed conversion infrastructure

Inventive Principle:
Principle #23Feedback

3Measurement precision

If broader bandwidth requirements are implemented to reduce distortion, then signal fidelity improves, but bandwidth constraints of the transmitter are exceeded

Engineering Contradiction:
Improvesignal fidelityVSAvoidtransmitter bandwidth
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent applies partial correction by focusing the predistortion effort on the most significant distortion components rather than attempting to correct all frequency components equally. The DPD algorithm targets the dominant nonlinear distortion terms while accepting that some higher-order or less significant distortion components remain uncorrected, thereby achieving good signal fidelity within the constrained transmitter bandwidth

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20260066943A1System and method for linearizing frequency multipliers with constrained transmitter bandwidth
Publication Date: 2026.03.05 BEN AYED AHMED
  • US20260066943A1 patent drawing
  • US20260066943A1 patent drawing
  • US20260066943A1 patent drawing

AI summary

Systems and methods are disclosed for utilizing frequency multiplier (FX) based transmitters to generate wideband, substantially distortion-free signals, when a transmitter operates under bandwidth constraints. A receiver is configured to acquire the feedback signal at the multiplier output. The systems and methods alleviate the bandwidth constraints of the receiver. Additionally, the invention includes a training methodology for estimating predistortion coefficients configured to operate under constrained transmitter and receiver bandwidth conditions.