Frequency Synthesizer Locking Using Compensated Modulus

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Solution Overview

Problem

Frequency generators in electronic devices face challenges with power management, as reducing power consumption increases latency and delays in communication operations, particularly in low-power modes where restarting locked loops after standby periods results in significant relocking delays, impacting device performance.

Innovation Solution

Implementing a frequency synthesizer with accelerated locking by using a higher reference frequency and a compensated modulus value to quickly restart the frequency generator, combining a precise fixed-frequency oscillator signal with a less precise voltage-based reference signal to maintain accuracy and reduce latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If power consumption is reduced by using lower reference frequencies in low-power mode, then energy efficiency is improved, but relocking duration and latency increase significantly

Engineering Contradiction:
Improvepower consumptionVSAvoidrelocking duration
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The system pre-calculates and stores a compensated modulus value that accounts for the frequency difference between the low-power reference signal and the fixed-frequency oscillator. This preliminary computation enables the frequency generator to lock quickly to the higher frequency reference signal without requiring lengthy calibration, thus reducing relocking duration while maintaining power efficiency

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system changes the reference frequency parameter dynamically between high-power mode (higher frequency for fast locking) and low-power mode (lower frequency for energy efficiency). By applying a compensated modulus value, the system ensures that the output frequency remains accurate despite the parameter change, resolving the contradiction between power consumption and relocking speed

Inventive Principle:
Principle #35Parameter changes

2Loss of time

If a higher reference frequency is used to accelerate locking, then relocking duration is reduced, but output frequency precision deteriorates due to voltage-based oscillator inaccuracies

Engineering Contradiction:
Improverellocking durationVSAvoidoutput frequency precision
Core Design Contradiction:
Loss of timeVSMeasurement precision

Solution Approach 1:

The fixed-frequency oscillator acts as an intermediary reference that bridges the voltage-based reference signal and the frequency generator. The compensated modulus value is calculated based on the stable fixed-frequency oscillator characteristics, allowing the system to use the fast voltage-based reference signal while maintaining precision through the stable intermediary reference

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system substitutes the traditional direct use of voltage-based oscillator frequency for frequency generation with a compensated approach using a stable fixed-frequency oscillator as the primary reference. This substitution replaces the inaccurate voltage-based frequency determination with a precise oscillator reference, maintaining output frequency precision while allowing fast voltage-based oscillation for accelerated locking

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10615808B1Frequency synthesis with accelerated locking
Publication Date: 2020.04.07 QUALCOMM INC
  • US10615808B1 patent drawing
  • US10615808B1 patent drawing
  • US10615808B1 patent drawing

AI summary

An apparatus is disclosed that implements frequency synthesis with accelerated locking. In an example aspect, the apparatus includes an oscillating signal source, a modulus compensator, and a frequency generator. The oscillating signal source is configured to provide a reference signal having a reference frequency. The modulus compensator is coupled to the oscillating signal source and is configured to receive the reference signal. The modulus compensator is configured to produce a compensated modulus value based on the reference frequency, a fixed oscillator frequency of a fixed-frequency oscillator signal, and a modulus value. The frequency generator is coupled to the oscillating signal source and the modulus compensator and is configured to receive the compensated modulus value. The frequency generator is configured to generate an output signal having an output frequency that is based on the reference frequency and the compensated modulus value.