Frequency-Based Voltage Comparator for Clock Suppression
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Solution Overview
Problem
Conventional voltage comparator arrangements in electronic circuits require high accuracy and speed to suppress the clock signal when the supply voltage falls below a threshold, which is challenging, especially at high system frequencies, and often result in malfunctions such as memory reading errors.
Innovation Solution
A digital voltage comparator arrangement that uses a voltage-controlled oscillator and a reference oscillator to generate clock and reference clock signals, allowing for precise digital comparison of clock frequencies to determine when to suppress or resume the clock signal, thereby controlling dynamic power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional voltage comparator arrangement is used to suppress the clock signal when supply voltage falls below threshold, then the electronic circuit can be protected from faulty operation, but the comparator requires high accuracy and speed which is challenging at high system frequencies and may cause malfunctions such as memory reading errors
Solution Approach 1:
The patent introduces a voltage-controlled oscillator as an intermediary element between the supply voltage and the clock signal. The oscillator converts voltage variations into frequency variations, allowing indirect comparison. Instead of directly comparing voltages with high precision, the system compares frequencies generated by the oscillator, which are easier to measure accurately even at high system frequencies, thereby resolving the contradiction between reliability protection and measurement precision
Solution Approach 2:
The patent replaces the conventional direct voltage comparison mechanism with a frequency-based comparison mechanism. By using a voltage-controlled oscillator to convert voltage information into frequency information, and then comparing frequencies instead of voltages directly, the system achieves accurate threshold detection without requiring high-speed high-precision voltage comparators, thus solving the contradiction between protection reliability and measurement accuracy at high frequencies
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables more precise and cost-effective clock suppression, preventing malfunctions by accurately determining when to stop or resume the clock signal based on frequency measurements, thus adapting power consumption to available voltage levels.
Implementation Method 1
a voltage-controlled oscillator, which is coupled to the supply bus and is configured to generate a clock signal with a clock frequency according to the supply voltage
Implementation Method 2
a comparator, which is coupled to the voltage-controlled oscillator and the at least one reference oscillator and is configured to compare the clock signal with the reference clock signal
Data Source
AI summary
In various embodiments, an electronic component is provided. The electronic component may include a supply bus configured to provide a supply voltage for an electronic circuit. The electronic component may further include a voltage-controlled oscillator, which is coupled to the supply bus and is configured to generate a clock signal with a clock frequency according to the supply voltage. The electronic component may further include at least one reference oscillator, which is configured to generate a reference clock signal with a reference clock frequency, and a comparator, which is coupled to the voltage-controlled oscillator and the at least one reference oscillator and is configured to compare the clock signal with the reference clock signal and, on the basis of the comparison, either to output the clock signal to the electronic circuit or to suppress it.