Fresnel Lens Logic Circuit for Real-Time Holographic Projection
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Solution Overview
Problem
Existing holographic projector systems face inefficiencies in calculating Fresnel lens values, requiring numerous multiplications for each pixel, which is resource-intensive and demanding, especially in real-time holographic projection systems.
Innovation Solution
A logic circuit is developed that reduces the number of multiplications needed to calculate Fresnel lens values by using an arithmetic progression of integers and addition functions instead of multiplication functions, particularly suitable for field-programmable gate arrays, to generate a continuous stream of Fresnel lens values for a pixelated display device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional multiplication functions are used to calculate Fresnel lens values, then calculation accuracy is maintained, but processing resource consumption increases significantly
Solution Approach 1:
The patent transforms the calculation parameter from multiplication operations to addition operations by using the relationship x² = (x-1)² + 2x - 1. This parameter change maintains calculation accuracy while significantly reducing processing resource consumption, as addition is computationally less intensive than multiplication.
Solution Approach 2:
The patent substitutes the mechanical multiplication operation with an equivalent addition-based computational mechanism. By using iterative addition and register storage, the system replaces resource-intensive multiplication hardware operations with simpler addition circuits, reducing overall processing demands.
2Speed
If real-time holographic projection is implemented, then projection speed is improved, but processing complexity increases
Solution Approach 1:
The patent performs preliminary calculations by pre-computing and storing intermediate values in registers before the actual projection process. The first register stores (x-1)² and the second register stores 2x-1, allowing the final x² value to be obtained through a simple addition operation during real-time projection, thus reducing processing complexity while maintaining speed.
Solution Approach 2:
The patent segments the calculation of Fresnel lens values into separate computational components stored in different registers. By dividing the calculation into (x-1)² and 2x-1 parts stored in separate registers, the system can process these segments independently and combine them through addition, reducing overall processing complexity for real-time operation.
3Productivity
If the number of multiplications is reduced, then processing efficiency is improved, but calculation method complexity increases
Solution Approach 1:
The patent implements a self-service calculation mechanism where the system maintains its own computational state in registers across iterations. The registers automatically store and update intermediate values ((x-1)² and 2x-1), allowing the calculation to serve itself by reusing previously computed values rather than requiring external recalculation, thus improving efficiency while keeping the method systematic.
Data Source
AI summary
A logic circuit comprises a logic sub-circuit arranged to output a stream, S1, of Fresnel lens values, F(x), of a Fresnel lens for display on [m×n] pixels of a pixelated display device, and an iterative method outputs a stream, S1, of Fresnel lens values, F(x), of a Fresnel lens for display on [m×n] pixels of a pixelated display device. The circuit and method can reduce the number of multiplications used to provide each value of a stream of display values for the display device, wherein the display values include values of a Fresnel lens function. Accordingly, they can be implemented in an advanced integrated circuit, such as a field-programmable gate array.