Front-End Data Transmission Controller for Back-End Processor Load Reduction
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Solution Overview
Problem
The transmission of big data in data processing systems increases the burden on back-end processors and consumes significant resources due to inefficient transmission mechanisms, leading to slow data processing.
Innovation Solution
An apparatus and method for data transmission that includes a front-end processor connected to a back-end processor through a transmission controller, utilizing a DMA controller, transmission scheduler, memory controller, and multiple transmission buffers to manage data transfer efficiently, with scheduling mechanisms to ensure equal authority and timely data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If big data transmission is performed using conventional transmission mechanisms, then data can be transmitted from front-end memory to back-end memory, but the back-end processor burden increases and resource consumption increases
Solution Approach 1:
The patent introduces a transmission controller as an intermediary device between the front-end processor and back-end processor. The transmission controller receives data from the front-end processor through DMA transmission and transmits it to the back-end processor, thereby isolating the back-end processor from direct data transmission tasks and reducing its burden and resource consumption.
Solution Approach 2:
The patent divides the data transmission system into distinct functional segments: front-end processor for data generation, transmission controller for data transmission management, and back-end processor for data processing. This segmentation allows each component to perform its specialized function efficiently, preventing the back-end processor from being overwhelmed by transmission tasks.
2Productivity
If big data transmission is performed using conventional transmission mechanisms, then data can be transmitted, but the transmission process is slow
Solution Approach 1:
The transmission controller is designed with autonomous capabilities to manage data transmission independently. It can automatically receive data packets from the front-end processor, control the transmission process, and deliver data to the back-end processor without requiring continuous intervention from the back-end processor, thereby accelerating the transmission process.
Solution Approach 2:
The system performs preliminary data packaging and transmission control at the transmission controller before data reaches the back-end processor. The transmission controller prepares data packets and manages transmission queues in advance, so that when data arrives at the back-end processor, it is already organized and ready for processing, reducing overall transmission time.
3Ease of operation
If the back-end processor handles data transmission directly, then data transmission can be performed, but the burden on the back-end processor increases
Solution Approach 1:
The transmission controller serves as an intermediary that handles the complexity of data transmission. It manages data packet reception, transmission control, and delivery to the back-end processor, thereby simplifying the back-end processor's workload while maintaining full data transmission functionality.
Solution Approach 2:
The patent extracts the data transmission function from the back-end processor and relocates it to a dedicated transmission controller. This extraction removes the transmission burden from the back-end processor, allowing it to focus on data processing tasks while the transmission controller handles all transmission-related operations.
Data Source
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AI summary
An apparatus, a method for data transmission and a readable storage medium, the apparatus includes a front-end processor (101), a transmission controller (102) and a back-end processor (103). In the front-end processor (101), a DMA controller (1011) is respectively connected with the transmission controller (102), a memory controller (1013), respective transmission buffers (1014, 1015) and a transmission scheduler (1012), and the transmission controller (102) and the transmission scheduler (1012) are respectively connected with the respective transmission buffers (1014, 1015). The DMA controller (1011) is configured to: receive a request for data transmission sent by the back-end processor (103), receive read data from the memory controller (1013), and send it to the transmission buffers (1014, 1015). The memory controller (1013) is configured to: control, according to a data reading instruction, the memory to read data, and send the read data to the DMA controller (1011). The transmission scheduler (1012) is configured to: control multiple transmission buffers (1014, 1015) to write data sent by the DMA controller (1011), and control the multiple transmission buffers (1014, 1015) to read data, and transmit, through the transmission controller (102), the data to the back-end processor (103). By performing fast transmission of big data, the consumption of large amounts of resources is avoided.