Front End Track Table for Delayed Branch Implementation

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Solution Overview

Problem

Current processor architectures face inefficiencies in handling multiple tasks due to high context switch overhead, especially when dealing with fine-grain parallelism and large numbers of threads, as they require duplicating architecture state elements for each thread, leading to increased area, power consumption, and complexity, and struggle with efficient threading and parallelization of non-threaded software codes.

Innovation Solution

Implementing a delayed branch mechanism using a front-end track table to optimize branch prediction by scheduling branch instructions and their dependencies, allowing for speculative execution and conditional predication, which reduces branch misprediction penalties and enables efficient thread management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If hardware duplicates all architecture state elements for each supported thread, then context switch overhead is eliminated for hardware-supported threads, but area, power consumption, and device complexity increase significantly

Engineering Contradiction:
Improvecontext switch overheadVSAvoidhardware complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The architecture state is segmented into two parts: a small fixed number of hardware-supported threads have full state duplication, while additional software threads share the common state. This segmentation allows context switch elimination for hardware threads without duplicating full state for all threads, reducing area and complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The common state elements are made universal and shared among multiple software threads. Instead of duplicating state for each thread, the same state resources are universally accessed by software threads, eliminating the need for extensive duplication while supporting fine-grain parallelism.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Loss of time

If hardware supports multiple context states for limited threads, then context switching is eliminated, but the number of supported threads is limited and area increases

Engineering Contradiction:
Improvecontext switch overheadVSAvoidnumber of supported threads
Core Design Contradiction:
Loss of timeVSQuantity of substance

Solution Approach 1:

Thread support is segmented into hardware-supported threads (limited number with full state) and software threads (unlimited number sharing common state). This allows the system to support a large number of threads without increasing hardware state duplication, as software threads leverage the shared common state.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system transitions from a single-dimension approach (hardware state duplication) to a two-dimension approach (hardware-supported threads + software threads). Software threads are added in a new dimension that shares resources, allowing unlimited thread support without proportional increases in hardware complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Quantity of substance

If context switch is performed for software threads exceeding hardware threads, then all threads can be supported, but context switch overhead increases

Engineering Contradiction:
Improvenumber of supported threadsVSAvoidcontext switch overhead
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The common state is prepared and maintained in advance, allowing software threads to switch contexts without performing full context switches. The state is preliminarily organized to be shared, enabling fast thread switching for software threads while hardware threads maintain their own state for immediate context switch elimination.

Inventive Principle:
Principle #10Preliminary action

4Productivity

If fine grain parallelism is implemented with large number of threads, then parallelism is achieved, but context switch overhead and software overhead increase

Engineering Contradiction:
Improvefine grain parallelismVSAvoidcontext switch overhead
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

Fine-grain parallelism tasks are assigned to software threads that share the common state, avoiding full context switches. The segmentation of state management allows numerous fine-grain threads to execute in parallel with minimal overhead, as they leverage the shared common state rather than requiring individual state duplication.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10417000B2Method for a delayed branch implementation by using a front end track table
Publication Date: 2019.09.17 INTEL CORP
  • US10417000B2 patent drawing
  • US10417000B2 patent drawing
  • US10417000B2 patent drawing

AI summary

A method for a delayed branch implementation by using a front end track table. The method includes receiving an incoming instruction sequence using a global front end, wherein the instruction sequence includes at least one branch, creating a delayed branch in response to receiving the one branch, and sing a front end track table to track both the delayed branch the one branch.