Front-Side Drain Contacts for Trench FET Parasitic Resistance
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Solution Overview
Problem
Trench FET devices face packaging issues and parasitic resistance due to the need for a thin back grind and the presence of a transition area between the epitaxy and bulk substrate regions, limiting their operational efficiency and density.
Innovation Solution
The introduction of front-side drain contacts within the epitaxy region, eliminating the need for a transition area and allowing current paths to be contained entirely within the epitaxy layer, thereby reducing parasitic resistance and enabling flip-chip style packaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If trench FET devices are used to improve density, then device density is improved, but parasitic resistance increases due to the transition area between epitaxy and bulk substrate
Solution Approach 1:
The invention extracts and eliminates the transition area between the epitaxy layer and bulk substrate by configuring the trench to extend only through the epitaxy layer. This removes the source of parasitic resistance while preserving the high-density benefits of trench FET structure.
Solution Approach 2:
The invention changes the dimensional configuration by limiting the trench depth to only the epitaxy layer thickness rather than extending into the bulk substrate. This dimensional adjustment eliminates the transition region while maintaining the vertical channel structure for high density.
2Object-affected harmful factors
If a thin back grind is used to reduce parasitic resistance, then parasitic resistance is reduced, but packaging complexity increases
Solution Approach 1:
Instead of modifying the back side of the substrate (thin back grind), the invention inverts the approach by placing the drain contact on the front side within the trench structure. This eliminates parasitic resistance without complicating the packaging process.
Solution Approach 2:
The invention extracts the drain contact from the traditional back-side location and repositions it to the front side within the trench. This eliminates the need for thin back grinding while reducing parasitic resistance through direct contact with the drift region.
3Quantity of substance
If drain contacts are located on the back side of the wafer, then vertical FET density is improved, but manufacturing flexibility decreases
Solution Approach 1:
The invention inverts the conventional drain contact location from the back side to the front side of the wafer. This maintains vertical FET density while enabling greater manufacturing flexibility and alternative packaging options such as flip-chip mounting.
Solution Approach 2:
By placing drain contacts on the front side within the trench structure, the invention enables multiple packaging configurations including traditional wire bonding and flip-chip mounting. This multi-functional approach increases manufacturing flexibility while preserving vertical density.
Data Source
AI summary
A method is provided for forming an integrated circuit (IC) structure including trench-based semiconductor devices, e.g., trench FETs, having front-side drain contacts. The method may include forming an epitaxy region, forming a poly gate trench in the epitaxy region, forming a drain contact trench through the poly gate trench and extending below the poly gate trench, forming a poly gate in the poly gate trench, forming a front-side drain contact in the drain contact trench, and forming a source region in the epitaxy region adjacent the poly gate. The device may define a drift region from the poly gate/source intersection to the front-side drain contact. The drift region may be located within the epitaxy layer, without extending into an underlying substrate or transition layer. The front-side drain contact depth may be selected to influence the device breakdown voltage. The front-side drain contacts may allow flip-chip mounting of the IC structure.