Frontside Port and Cavity Structure for CMOS-Compatible Sample Delivery

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Solution Overview

Problem

Existing LOC sensors face challenges in incorporating backside fluid reservoirs due to high costs and incompatibility with current CMOS process flows, limiting their integration and efficiency in detecting and characterizing targets in fluid samples.

Innovation Solution

A semiconductor structure with a sensing element and frontside port and cavity features, allowing sample conveyance through MOL and BEOL dielectric layers, enabling efficient sample exposure to the sensing element without the need for expensive backside reservoirs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If backside fluid reservoirs are used in LOC sensors, then sample exposure to sensing element is achieved, but manufacturing cost increases and CMOS process compatibility is lost

Engineering Contradiction:
Improvesample exposureVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

Instead of creating reservoirs on the backside of the substrate (conventional approach), the patent inverts the approach by forming reservoirs on the frontside of the substrate, within the MOL dielectric layer. This inversion allows the use of standard frontside CMOS processing techniques, eliminating the need for expensive backside processing while achieving the same sample exposure function.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The MOL dielectric layer serves multiple functions: it acts as both the structural layer for the sensor and as the medium containing the fluid reservoir. The reservoir formed within this layer serves dual purposes of sample delivery and sensor operation, eliminating the need for separate backside reservoir structures and enabling integration with standard CMOS processes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If backside fluid reservoirs are used in LOC sensors, then sample exposure to sensing element is achieved, but integration with CMOS process flow is reduced

Engineering Contradiction:
Improvesample exposureVSAvoidCMOS process integration
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent inverts the conventional backside reservoir approach to frontside reservoir formation within the MOL layer. This inversion enables the use of standard frontside CMOS processing techniques such as photolithography, etching, and deposition that are already established in CMOS manufacturing, thereby achieving full process compatibility.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The reservoir formation process is merged with the existing MOL dielectric layer fabrication process. The reservoir is created as an integral part of the MOL layer structure through modifications to the standard CMOS process flow, combining the reservoir function with the existing dielectric layer rather than adding a separate processing step.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of operation

If frontside port and cavity features are used, then sample conveyance through dielectric layers is enabled, but device complexity increases

Engineering Contradiction:
Improvesample conveyanceVSAvoidstructure complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The fluid delivery system is segmented into distinct functional zones: the reservoir region within the MOL layer, the cavity region, and the port region extending to the surface. This segmentation allows each zone to be optimized independently while maintaining overall simplicity through the use of standard photolithographic patterning and etching processes to create the segmented structure.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12411105B2Semiconductor structure with frontside port and cavity features for conveying sample to sensing element
Publication Date: 2025.09.09 GLOBALFOUNDRIES US INC
  • US12411105B2 patent drawing
  • US12411105B2 patent drawing
  • US12411105B2 patent drawing

AI summary

A structure includes a lab-on-chip (LOC) sensor and frontside port and cavity features for conveying a flowable sample (fluid or gas) to a sensing element of the sensor. The cavity is confined within middle of the line (MOL) dielectric layer(s). Alternatively, the cavity includes a lower section within MOL dielectric layer(s), an upper section within back end of the line (BEOL) dielectric layer(s) in the first metal (M1) level, a divider between the sections, and a duct linking the sections. Alternatively, the cavity includes a lower portion within MOL dielectric layer(s) and an upper portion continuous with the lower portion and within BEOL dielectric layer(s) in the M1 level. Optionally, the cavity is separated from the sensing element by an additional dielectric layer and/or at least partially lined with a dielectric liner. The port extends from the top of the BEOL dielectric layers down to the cavity.