Frontside Feedthrough Layout for Low-Resistance Dense Chip Interconnects

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Solution Overview

Problem

Existing semiconductor chip technologies face challenges with feedthrough connections that are either too resistive for high-current applications or not conducive to density scaling, often requiring complex processing.

Innovation Solution

Implementing frontside feedthrough connections that are formed directly through the active circuitry using a non-selective etch, filled with low-resistance materials like tungsten, copper, or molybdenum, allowing for both high- and low-resistance paths without backside processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If backside power delivery with feedthrough connections is implemented, then power delivery to active circuitry is enabled, but the feedthrough connections become too resistive for high-current applications

Engineering Contradiction:
Improvepower delivery capabilityVSAvoidfeedthrough resistance
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent inverts the conventional approach by forming feedthrough connections on the frontside of the semiconductor substrate rather than the backside. This allows the feedthrough connections to be made directly over active circuitry elements, enabling low-resistance electrical contact for high-current applications while maintaining backside power delivery architecture

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent changes the location parameter of feedthrough formation from backside to frontside, and modifies the formation method to use non-selective etching followed by metal filling. This parameter change enables direct contact with active circuitry, reducing resistance and improving power delivery capability for high-current applications

Inventive Principle:
Principle #35Parameter changes

2Reliability

If deep via bars are used to provide low-resistance paths, then high-current applications are supported, but valuable silicon area is consumed limiting density scaling

Engineering Contradiction:
Improvefeedthrough resistanceVSAvoidsilicon area for active circuitry
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The patent applies local quality by forming feedthrough connections specifically at locations where active circuitry elements are present, rather than requiring dedicated via bar regions. The non-selective etch selectively removes material only where metal layers and active circuitry exist, creating localized low-resistance paths that do not consume additional silicon area

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The frontside feedthrough connections serve multiple functions: they provide low-resistance power delivery paths, enable direct contact with active circuitry, and eliminate the need for separate via bar structures. This multi-functionality allows the same structure to support high-current applications while maintaining maximum silicon area for active circuitry density

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Area of moving object

If epitaxial feedthroughs are used for density scaling, then active circuitry density can be increased, but the process flow becomes complex with multiple patterning steps

Engineering Contradiction:
Improveactive circuitry densityVSAvoidprocess flow complexity
Core Design Contradiction:
Area of moving objectVSDevice complexity

Solution Approach 1:

The patent extracts the complex epitaxial growth and multiple patterning steps from the feedthrough formation process. Instead, it uses a simplified approach with non-selective etching followed by metal filling, removing unnecessary process complexity while achieving the same density scaling benefits

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the etch selectivity parameter to non-selective, eliminating the need for selective epitaxial growth and multiple patterning steps. This parameter change simplifies the process flow while maintaining the ability to form dense feedthrough connections throughout the active circuitry area

Inventive Principle:
Principle #35Parameter changes

4Ease of manufacture

If epi blocking layers and design rules are implemented, then feedthrough formation is controlled, but the design flexibility and density scaling are restricted

Engineering Contradiction:
Improvefeedthrough formation controlVSAvoiddesign flexibility
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent removes epi blocking layers and restrictive design rules from the process. The non-selective etch approach naturally provides control through the presence of metal layers and active circuitry, eliminating the need for additional blocking structures and design constraints, thereby increasing design flexibility and adaptability

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables higher density active circuitry by saving valuable silicon area and providing better feedthrough performance with a simpler process flow, reducing resistance and eliminating the need for complex design rules and epi blocking layers.

Implementation Method 1

a non-selective etch to form openings through the active circuitry

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

filled with low-resistance materials like tungsten, copper, or molybdenum, allowing for both high- and low-resistance paths

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS20250385166A1Frontside feedthrough connections
Publication Date: 2025.12.18 INTEL CORP
  • US20250385166A1 patent drawing
  • US20250385166A1 patent drawing
  • US20250385166A1 patent drawing

AI summary

Semiconductor devices and systems with conductive feedthroughs, and methods of forming the same, are disclosed herein. In one example, a semiconductor device includes a first interconnect, a second interconnect, and a layer between the first and second interconnects. The layer between the interconnects includes epitaxial structures and a conductive feedthrough. The conductive feedthrough extends through the layer and electrically couples the first and second interconnects, and one or more of the epitaxial structures are truncated by the conductive feedthrough.