Frozen Set Mapping Between Polar and Product Codes for Hybrid Decoding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current technologies face challenges in efficiently mapping frozen sets between polar codes and product codes, leading to suboptimal performance in decoding due to sequential nature of polar code decoding and high complexity of product code decoding.
Innovation Solution
The development of a mapping apparatus and method that generates a frozen vector associated with a polar code codeword based on a frozen matrix from a product code codeword, allowing for efficient decoding of product codes using polar code decoding schemes, and vice versa, enabling a hybrid decoding approach with improved latency and error-correction performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If polar code decoding is used, then error-correction performance is improved, but decoding latency increases due to sequential nature
Solution Approach 1:
The patent segments the frozen set mapping process into distinct functional units: a mapping apparatus that generates frozen vectors from frozen matrices, and a decoding unit that performs hybrid decoding. This segmentation allows the system to maintain the error-correction benefits of polar codes while introducing parallel processing capabilities that reduce sequential decoding latency.
Solution Approach 2:
The patent introduces an intermediary frozen vector generation mechanism that bridges polar code theory and product code structure. The mapping apparatus acts as an intermediary, converting between frozen set representations and frozen matrix structures, enabling hybrid decoding that combines advantages of both coding schemes while mitigating their individual drawbacks.
2Productivity
If product code decoding is used, then decoding parallelism is improved, but decoding complexity increases
Solution Approach 1:
The patent creates a universal decoding framework that can handle both polar codes and product codes through a single hybrid decoding apparatus. The decoding unit is designed to accept frozen vectors from the mapping apparatus and perform decoding operations that incorporate both polar code error-correction capabilities and product code parallelism, reducing the need for separate specialized decoders.
Solution Approach 2:
The patent changes the structural parameters of the frozen set representation by introducing frozen matrices and their corresponding vectors. This parameter transformation enables the system to switch between different decoding modes and complexity levels, allowing the decoder to adapt its operation based on channel conditions and performance requirements.
3Reliability
If frozen set mapping between polar codes and product codes is implemented, then hybrid decoding performance is improved, but implementation complexity increases
Solution Approach 1:
The patent performs preliminary action by pre-generating frozen vectors from frozen matrices using the mapping apparatus before the actual decoding process. This pre-processing step establishes the necessary data structures and relationships in advance, simplifying the subsequent hybrid decoding operations and reducing runtime complexity.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
The invention relates to a mapping apparatus (401) for generating a frozen vector associated with a polar code codeword on the basis of a frozen matrix associated with a product code codeword, the frozen matrix being of size N c x N r . The frozen matrix comprises a plurality of bits. The mapping apparatus (401) comprises a processing unit (403) configured to: replicate a first matrix row of the frozen matrix N c times to generate an expanded matrix row; replicate a first matrix column of the frozen matrix N r times to generate an expanded matrix column; generate the frozen vector on the basis of the expanded matrix row and the expanded matrix column, wherein a respective bit value of the frozen vector equals 1 if a respective corresponding bit of the expanded matrix row or a further respective corresponding bit of the expanded matrix column equals 1 and, otherwise, the respective bit value of the frozen vector equals 0. The invention further relates to a mapping apparatus (411) for generating a frozen matrix associated with a product code codeword on the basis of a frozen vector associated with a polar code codeword, wherein the product code codeword comprises a matrix of size N c x N r , and the frozen vector comprises a vector of size N with a plurality of bits.