Floating Random Walk Capacitance Extraction Pre-Characterization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current methods for parasitic capacitance extraction in integrated circuits, particularly in RF circuit designs, face challenges with accuracy and efficiency due to the complexity of modeling electromagnetic effects in high-frequency ranges, especially when dealing with multiple dielectric layers, leading to high memory requirements and computational burdens.

Innovation Solution

A multi-tier domain pre-characterization method for floating random walk capacitance extraction is introduced, which includes a processor-based system for recursively executing the floating random walk algorithm over conductors, determining potential and coupling capacitance, and utilizing pre-characterized domains to improve accuracy and convergence time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If pre-characterization of all possible combinations of dielectric layers for all transition domain sizes is performed, then accuracy of capacitance extraction is improved, but memory requirements and computational burden become prohibitive

Engineering Contradiction:
Improveaccuracy of capacitance extractionVSAvoidmemory requirements
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent segments the transition domain characterization into multiple hierarchical levels (tiers). Instead of pre-characterizing all possible dielectric combinations at once, the method divides the domain into coarse-grained regions first, then progressively refines specific sub-regions that require higher accuracy. This segmentation allows the system to manage memory requirements by processing smaller, manageable portions of the overall characterization space at each tier level.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies preliminary action by performing coarse-grained pre-characterization of transition domains before the actual capacitance extraction process. The most significant dielectric layer configurations are pre-computed and stored in a lookup table, while finer details are computed on-demand during extraction. This preliminary preparation reduces the computational burden during the main extraction process while maintaining accuracy.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If pattern matching methods with comprehensive databases are used, then extraction accuracy is improved, but solution time and memory requirements increase significantly

Engineering Contradiction:
Improveextraction accuracyVSAvoidsolution time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary characterization of transition domains and stores results in a lookup table before the actual capacitance extraction. By pre-computing the electrical characteristics of different dielectric configurations and storing them for quick retrieval, the method eliminates the need for time-consuming on-the-fly computations during extraction, thus significantly reducing solution time while maintaining accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates simplified representations (copies) of complex dielectric structures in the form of pre-computed lookup tables. Instead of repeatedly analyzing the full geometric complexity of each dielectric configuration during extraction, the system uses pre-generated electrical characteristic data that captures the essential behavior, enabling fast pattern matching and retrieval without re-computing the full electromagnetic fields.

Inventive Principle:
Principle #26Copying

3Measurement precision

If discretization-based solvers are used for capacitance extraction, then accuracy is improved, but memory requirements become prohibitive for very large integrated circuits

Engineering Contradiction:
Improvecapacitance extraction accuracyVSAvoidmemory requirements
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent segments the integrated circuit into smaller extraction regions and processes them independently using the multi-tier method. By dividing the large circuit into manageable blocks and applying hierarchical characterization to each block, the system maintains discretization-based accuracy for local regions while avoiding the need to store and process the entire circuit's discretized model in memory simultaneously.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary characterization of transition domains at multiple hierarchical levels before the actual capacitance extraction. By pre-computing and storing the electrical characteristics of dielectric configurations in a lookup table, the method eliminates the need for memory-intensive on-the-fly discretization during extraction, thus reducing memory requirements while maintaining accuracy.

Inventive Principle:
Principle #10Preliminary action

4Productivity

If comprehensive pre-characterization of transition domains is performed, then convergence time of random walk algorithm is improved, but computational burden during pre-computation becomes prohibitive

Engineering Contradiction:
Improveconvergence time of random walk algorithmVSAvoidcomputational burden during pre-computation
Core Design Contradiction:
ProductivityVSPower

Solution Approach 1:

The patent segments the pre-computation process into multiple hierarchical tiers, where each tier processes a specific level of detail. The first tier performs coarse-grained characterization of large transition domains, while subsequent tiers refine specific sub-regions. This segmentation allows the system to achieve good convergence characteristics without the prohibitive computational cost of fully characterizing every possible transition domain at maximum detail.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by performing pre-characterization only for the most significant dielectric layer configurations and transition domain sizes that are most likely to be encountered during actual capacitance extraction. Rather than exhaustively characterizing all possible combinations, the method focuses computational resources on the predominant cases, achieving sufficient convergence speed without excessive pre-computation burden.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10274533B1Pre-computation system and method for transition domain characterization within a floating random walk based multi-dielectric capacitance extraction methodology
Publication Date: 2019.04.30 ANSYS INC
  • US10274533B1 patent drawing
  • US10274533B1 patent drawing
  • US10274533B1 patent drawing

AI summary

An apparatus for performing multi-tier domain pre-characterization for floating random walk capacitance extraction of a semiconductor structure includes a processor configured to recursively execute a floating random walk algorithm, over a plurality of points for a plurality of conductors, to permit determination of a potential at a plurality of points on a Gaussian surface around each of a plurality of conductors and determination of a coupling capacitance between the plurality of conductors, each iteration of the floating random walk algorithm comprising selection of a domain about an initial boundary point on the Gaussian surface of the respective one of the plurality of conductors and determination of a new boundary point on the new domain, from which a successive boundary point is selected with a corresponding successive domain centered thereabout, this process continuing until a corresponding successive domain terminates at a boundary having a known potential, whereupon the processor determines the potential at the initial boundary point on the Gaussian surface of the respective one of the plurality of conductors, wherein at least one domain during each floating random walk is matched by the processor to one of a plurality of pre-characterized domains, the matching of the selected domain with the one of a plurality of pre-characterized domains utilizing a smart sweep method, a single dielectric method, a two-dielectric method, a three-dielectric method or an averaging method.