FSK Demodulation Timing Circuit for Low-Power Qi Receivers
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Solution Overview
Problem
Conventional FSK demodulation techniques require high processing power, making it difficult to implement on low processing power microcontrollers, which are necessary for medium power profile wireless power receivers in the Qi 1.2 protocol, as they typically do not operate at high enough clock frequencies or have sufficient processing power to demodulate FSK signals in the 85 kHz to 205 kHz range.
Innovation Solution
The use of a timing circuit, such as a multi-function peripheral with capture, compare, and pulse-width-modulation modes, to detect timing data between edges of the FSK wireless power signal, allowing a low processing power microcontroller to determine the modulation frequency and data bits without direct monitoring and processing of the signal, thereby reducing processing core usage and enabling accurate demodulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional FSK demodulation techniques are used, then accurate demodulation is achieved, but high processing power is required which low power microcontrollers cannot provide
Solution Approach 1:
The patent segments the FSK demodulation process into two distinct parts: (1) a timing circuit that captures edge timing information from the FSK signal, and (2) a low-power processing core that determines data bits from the captured timing data. This segmentation allows the high-frequency signal processing to be handled by hardware timing circuits while the low-power microcontroller only performs lightweight data bit determination, thus achieving accurate demodulation without requiring high processing power.
2Measurement precision
If direct monitoring and processing of FSK signal is performed, then demodulation is achieved, but processing core usage increases which is unsuitable for low power microcontrollers
Solution Approach 1:
The patent introduces timing data as an intermediary between the FSK signal and the processing core. The timing circuit captures and processes the FSK signal edges, converting them into timing data that represents the modulation frequency information. This intermediary timing data allows the low-power processing core to determine data bits without directly monitoring or processing the high-frequency FSK signal, thereby reducing processing core usage while maintaining accurate modulation frequency detection.
3Loss of energy
If low processing power microcontrollers are used, then power consumption is reduced, but they cannot operate at high enough clock frequencies to demodulate FSK signals
Solution Approach 1:
The patent replaces the mechanical approach of using high clock frequency processing to detect FSK signal edges with a hardware timing circuit that automatically captures edge timing information. Instead of relying on the microcontroller's processing speed to track signal edges, the timing circuit hardware performs the high-frequency edge detection and captures timing data, allowing the low-power microcontroller to operate at lower clock frequencies while still achieving accurate FSK demodulation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows low processing power microcontrollers to function as Qi 1.2 power receivers with minimal peripheral requirements and moderate processing core usage, achieving accurate FSK demodulation and enabling bi-directional communication in wireless power systems.
Implementation Method 1
Wireless power transfer uses the principle of magnetic induction to transfer power. The principle of operation of wireless power transfer is similar to that of a conventional alternating current (AC) transformer, with the receiver coils and the transmitter coils similar to the transformer windings.
Implementation Method 2
The communication from the wireless power transmitter to the wireless power receiver is implemented using frequency shift keying (FSK).
Data Source
AI summary
Frequency shift keying (FSK) demodulation for wireless power and related systems, methods, and devices is disclosed. An apparatus for a wireless power receiver includes a timing circuit and a processing core separate from the timing circuit. The timing circuit is to obtain a timer count every predetermined number of like edges of a frequency shift keying (FSK) wireless power signal. The FSK wireless power signal is to communicate data bits. The processing core is to determine the data bits of the FSK wireless power signal responsive to the obtained timer counts.