FSM Behavior Verification for Design Flaw Detection

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Solution Overview

Problem

Existing finite state machine (FSM)-modeled systems often exhibit suboptimal or incorrect design structures and behaviors, particularly in complex and highly interactive systems such as automated vehicles, avionics, and medical devices, which can lead to design errors and user interaction issues.

Innovation Solution

An automated system and method for verifying and correcting the behavior of FSM-modeled systems by receiving design data, searching for predetermined behavioral properties, flagging verified behavior, and providing notifications and recommendations for correcting problematic behaviors using a model verification platform.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If FSM-modeled systems are used for complex systems design, then system behavior can be modeled and controlled, but design errors and suboptimal structures can occur leading to incorrect behavior

Engineering Contradiction:
Improvesystem behavior correctnessVSAvoiddesign structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing automated verification of FSM design properties before the system is implemented. The system checks for deadlocks, unreachable states, and other design flaws in the FSM model before deployment, preventing errors from propagating to the actual system behavior.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by automatically analyzing FSM design data and providing verification results about system behavior correctness. The system feeds back information about design flaws, unreachable states, and potential errors to designers, enabling them to correct issues in the FSM model.

Inventive Principle:
Principle #23Feedback

2Manufacturing precision

If automated verification is performed on FSM design data, then design flaws can be identified, but additional processing time and computational resources are required

Engineering Contradiction:
Improvedesign verification accuracyVSAvoidverification processing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The verification system performs checks on FSM design data immediately when the data is created or modified, rather than waiting until later in the development process. This preliminary verification catches errors early when they are easier and faster to correct.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system performs self-verification by automatically analyzing its own FSM design data without requiring manual inspection. The automated analysis of design properties, state reachability, and potential deadlocks eliminates the need for time-consuming manual verification while maintaining high accuracy.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12561224B2Behavior verification for finite state machine (FSM)-modelled systems
Publication Date: 2026.02.24 GM GLOBAL TECHNOLOGY OPERATIONS LLC
  • US12561224B2 patent drawing
  • US12561224B2 patent drawing
  • US12561224B2 patent drawing

AI summary

A method for verifying system behavior and correcting design flaws in a finite state machine (FSM)-modeled system or any other representational method that includes receiving from a user device via a model verification platform, data associated with the system design. The data describes states, state transitions, events, and outputs of the FSM-modeled system. The method includes searching the data for predetermined behavior of the FSM-modeled system, including predetermined state(s) and/or mode changes. The method includes flagging the predetermined behavior as a verified behavior and performing a control action in response to the verified behavior, including transmitting a notification to the user device that is indicative of the verified behavior, and a design recommendation where applicable. Instructions for the method may be recorded in a computer readable storage medium and executed by a processor to cause the model verification platform to perform the method.