Ferroelectric Tunnel Junction Interface Layer for High TER Endurance
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Solution Overview
Problem
Ferroelectric tunnel junctions (FTJs) face challenges in achieving high tunnelling electroresistance (TER) and endurance due to oxygen diffusion from the ferroelectric tunnel barrier layer into the electrodes, which compromises device robustness and endurance.
Innovation Solution
Incorporating a thin isostructural interfacial layer with varying corner or centre site occupancy in the antiperovskite crystal lattice at the electrode-barrier interface, allowing independent tuning of electronic states without altering the lattice parameter or band structure, combined with compatible perovskite and antiperovskite materials to enhance TER and endurance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thin ferroelectric tunnel barrier layer is used to achieve high tunnelling electroresistance, then TER is improved, but oxygen diffusion into electrodes increases causing low endurance
Solution Approach 1:
A thin antiperovskite interfacial layer is introduced between the ferroelectric perovskite barrier and the electrode to act as an intermediary. This interfacial layer suppresses oxygen diffusion from the barrier into the electrode while maintaining the necessary electrical properties for high TER. The interfacial layer serves as a protective mediator that prevents harmful oxygen transport without compromising the tunneling electroresistance effect.
Solution Approach 2:
The device structure employs a composite material system combining perovskite ferroelectric barrier layer with antiperovskite interfacial layer and electrode materials. This composite structure leverages the complementary properties of different materials: the perovskite provides ferroelectricity and high TER, while the antiperovskite interfacial layer provides oxygen diffusion barrier properties, achieving both high reliability and endurance through material composition.
2Reliability
If the electrode material is optimized to maximize TER, then the ON/OFF ratio is improved, but oxygen diffusion from barrier into electrode increases reducing device robustness
Solution Approach 1:
The antiperovskite interfacial layer serves as a protective intermediary between the optimized electrode and the ferroelectric barrier. It allows the electrode to be optimized for maximum TER and ON/OFF ratio while the interfacial layer blocks oxygen diffusion from the barrier into the electrode, preventing degradation and maintaining device robustness.
Solution Approach 2:
The interfacial layer introduces local quality differentiation at the electrode-barrier interface. The electrode region can have properties optimized for electrical performance (high ON/OFF ratio) while the interfacial layer region provides localized oxygen barrier functionality. This spatial differentiation of material properties allows simultaneous optimization of electrical performance and oxygen resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances TER and improves the dynamic range and readout speed of non-volatile memory devices by maintaining high-quality interfaces and reducing oxygen diffusion, leading to more reliable and efficient data storage.
Implementation Method 1
Ferroelectric RAM (FeRAM) is an emerging NVRAM technology offering large ON/OFF ratios and fast read and write times together with lower power consumption compared to other NVRAM technologies that are current driven. FeRAM technology is based on ferroelectric tunnel junctions (FTJs), whereby information is encoded in the polarisation direction of a ferroelectric tunnel barrier layer sandwiched between two electrodes, which is switchable/reversible by applying an electric field between the electrodes.
Implementation Method 2
The TER is a measure of the change in electrical resistance of the device associated with the reversal of the ferroelectric polarisation (i.e. the ON/OFF ratio) and should be maximized to improve dynamic range and readout of the memory bit.
Data Source
AI summary
Disclosed is a ferroelectric tunnel junction device and memory cell, and relates to the technical field of ferroelectric tunnel junction devices, comprising a ferroelectric tunnel barrier layer; a first electrode layer on one side of the ferroelectric tunnel barrier layer; a second electrode layer on the other side of the ferroelectric tunnel barrier layer; and a first interfacial layer at the interface between the first electrode layer and the ferroelectric tunnel barrier layer. The first electrode layer comprises a first antiperovskite material and the first interfacial layer comprises a second antiperovskite material that differs from the first antiperovskite material in composition, and preferably in at least the occupancy of corner sites or the centre sites. Also disclosed is a memory cell comprising the ferroelectric tunnel junction device, wherein the data is recordable as a direction of electric polarisation of the ferroelectric tunnel barrier layer.