FTJ L-Shaped Spacer Structure for Uniform Edge Crystallization
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Solution Overview
Problem
Ferroelectric phase crystallization at the periphery of ferroelectric layers in ferroelectric tunnel junctions (FTJs) is less effective due to reduced stress from the coefficient of thermal expansion (CTE) difference between the ferroelectric material and surrounding electrodes, leading to nonuniformity and performance issues like electrical current leakage and variable capacitance. Additionally, achieving effective isolation of FTJs from neighboring devices is challenging.
Innovation Solution
The use of conformal dielectric spacers with a large difference in CTE, such as tantalum oxide, is implemented around the peripheral area and sidewalls of the ferroelectric layer to enhance stress-induced ferroelectric phase crystallization and improve isolation by coating the sidewalls of the FTJ, including the ferroelectric layer, thereby promoting uniform crystallization and reducing electromagnetic interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conformal dielectric spacers with lower CTE are employed to apply additional stress during annealing, then ferroelectric phase crystallization uniformity is improved, but device structure complexity increases
Solution Approach 1:
Conformal dielectric spacers are introduced as intermediary elements between the top electrode and the peripheral area, and between adjacent FTJ cells. These spacers apply controlled stress during annealing to promote uniform ferroelectric phase crystallization at the periphery, while also serving as isolation structures. The dual functionality of the spacers addresses the complexity concern by combining stress application and isolation functions in a single structural element.
Solution Approach 2:
The invention exploits the coefficient of thermal expansion (CTE) difference between the conformal dielectric spacer material and the ferroelectric layer. By selecting spacer materials with lower CTE than the ferroelectric layer, the structure generates compressive stress during thermal annealing that promotes uniform ferroelectric phase crystallization at the periphery, directly addressing the nonuniformity problem through thermal-mechanical coupling.
2Reliability
If conformal dielectric spacers are deposited to promote uniform ferroelectric phase crystallization, then electrical current leakage is reduced, but manufacturing process complexity increases
Solution Approach 1:
The conformal dielectric spacer serves multiple functions simultaneously: it applies stress during annealing to promote uniform ferroelectric phase crystallization, provides electrical isolation between adjacent FTJ cells, and acts as a physical barrier to prevent current leakage paths. This multi-functionality reduces the need for separate structures, thereby mitigating the increase in manufacturing process complexity while achieving multiple reliability improvements.
Solution Approach 2:
The invention changes the physical and chemical parameters of the spacer material (selecting materials with specific CTE values lower than the ferroelectric layer, controlling deposition thickness in the range of 5-50 nm) to optimize the stress application during annealing. These parameter changes enable the spacer to effectively promote uniform ferroelectric phase crystallization and reduce current leakage through controlled material properties rather than complex structural designs.
3Object-affected harmful factors
If conformal dielectric spacers are used to isolate FTJs from peripheral devices, then peripheral interference is reduced, but fabrication process steps increase
Solution Approach 1:
The conformal dielectric spacer acts as an intermediary isolation structure between the FTJ cells and peripheral devices. By positioning the spacers at the periphery of the ferroelectric layer and top electrode, they create a physical and electrical buffer zone that blocks interference from adjacent circuit elements. This intermediary structure achieves effective isolation while being integrated into the existing fabrication flow, minimizing the increase in process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The conformal dielectric spacers enhance ferroelectric phase crystallization across the ferroelectric layer, improving FTJ performance by reducing electrical current leakage and achieving more uniform capacitance, while also effectively isolating the FTJ from peripheral devices, thus enhancing the reliability of ferroelectric random access memory (FeRAM) arrays.
Implementation Method 1
The conformal dielectric spacer may be made of a material such as tantalum oxide (TaO) or another metal oxide, which has a large difference in CTE compared with the ferroelectric layer... promote ferroelectric phase crystallization during the annealing by imposing additional stress on the peripheral area of the ferroelectric layer
Implementation Method 2
The FTJ is annealed to induce ferroelectric phase crystallization in the ferroelectric layer of the FTJ
Implementation Method 3
The conformal dielectric spacer... disposed on the peripheral area of the ferroelectric layer and on the sidewall of the top electrode... effectively isolate the FTJ from peripheral devices
Data Source
AI summary
A ferroelectric tunnel junction (FTJ) includes bottom and top electrodes and a ferroelectric layer disposed between the bottom and top electrodes. A dielectric material is disposed in a space between a peripheral area of the ferroelectric layer and a sidewall of the top electrode. At least one conformal dielectric spacer is deposited. The FTJ is annealed to induce ferroelectric phase crystallization in the ferroelectric layer. The depositing at least one conformal dielectric spacer includes at least one of: (i) prior to the disposing of the dielectric material, depositing an inner conformal dielectric spacer on the peripheral area of the ferroelectric layer and on the sidewall of the top electrode, and/or (ii) after the disposing of the dielectric material, depositing an outer conformal dielectric spacer on dielectric material and on a sidewall of the peripheral area of the ferroelectric layer.


