Ferroelectric Tunnel Junctions With Sparse Seed Layers for Crystal Control
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Solution Overview
Problem
Challenges exist in achieving a desired crystal structure for ferroelectric layers on commonly used semiconductor device materials, which affects the ferroelectric properties and memory cell density in non-volatile memory devices.
Innovation Solution
The use of a discontinuous metallic seed structure is introduced to promote the growth of a desired crystal structure, such as orthorhombic, in ferroelectric layers, enhancing the ferroelectric properties and memory cell density by forming ferroelectric tunnel junctions with improved FE layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a continuous seed layer is used to promote crystal structure growth, then ferroelectric properties are improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The continuous seed layer is divided into discrete, spatially separated seed regions. Each seed region is positioned at specific locations where crystal nucleation is desired, eliminating the need for a complete continuous layer while maintaining effective crystal structure promotion in critical areas.
Solution Approach 2:
Instead of uniformly distributing seed material across the entire substrate, the invention applies seed material only at specific local regions where crystal nucleation is most beneficial. This creates non-uniform seed distribution optimized for local crystal growth requirements, reducing overall material usage and structural complexity.
2Device complexity
If a discontinuous seed structure is used to reduce complexity, then manufacturing precision and crystal structure quality deteriorate
Solution Approach 1:
The discrete seed regions are positioned in advance at optimal locations before the ferroelectric layer deposition begins. This preliminary placement ensures that crystal nucleation occurs at predetermined sites with correct orientation, maintaining manufacturing precision without requiring a continuous seed layer.
Solution Approach 2:
The discrete seed regions act as intermediary structures that mediate between the substrate and the ferroelectric layer. These intermediaries provide the necessary crystal template at critical interfaces, ensuring high-quality crystal structure formation without requiring complete coverage.
3Ease of manufacture
If common semiconductor device materials are used as substrates, then ease of manufacture is improved, but achieving desired crystal structure in ferroelectric layers becomes difficult
Solution Approach 1:
The discrete seed regions serve as intermediary layers between the common semiconductor substrate and the ferroelectric material. These seeds provide the necessary crystal template that bridges the lattice mismatch between conventional substrates and ferroelectric materials, enabling desired crystal structures to form on standard substrates.
Solution Approach 2:
By introducing discrete seed regions with specific material compositions and crystal structures, the invention changes the local interfacial parameters at critical nucleation sites. This allows the ferroelectric layer to adopt the desired crystal structure despite the substrate being made of common semiconductor materials with different lattice parameters.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach facilitates the formation of high-quality ferroelectric layers with enhanced coercive field and remnant polarization, leading to improved memory cell performance and increased density in non-volatile memory devices.
Implementation Method 1
The use of a discontinuous metallic seed structure is introduced to promote the growth of a desired crystal structure, such as orthorhombic, in ferroelectric layers
Data Source
AI summary
A memory device, transistor, and methods of making the same, the memory device including a memory cell including: a bottom electrode layer; a high-k dielectric layer disposed on the bottom electrode layer; a discontinuous seed structure comprising discrete particles of a metal disposed on the high-k dielectric layer; a ferroelectric (FE) layer disposed on the seed structure and directly contacting portions of high-k dielectric layer exposed through the seed structure; and a top electrode layer disposed on the FE layer.


