Hierarchical Authentication in Flash Translation Layer

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Solution Overview

Problem

Flash memory systems face limitations such as limited erase cycles leading to wear, vulnerability to security attacks due to long programming and erasing times, and insecurity during power interruptions, which affect data integrity and security.

Innovation Solution

A hierarchical authentication scheme is implemented within the Flash Translation Layer (FTL) to manage Flash memory operations, including data and mapping entry verification, wear leveling, and secure authentication mechanisms to ensure data integrity and security against power interruptions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If Flash memory programming and erasing operations are performed frequently, then data storage and updates are enabled, but wear of the Flash memory increases leading to reduced lifespan

Engineering Contradiction:
Improvedata storage capacityVSAvoidFlash memory lifespan
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the Flash memory address space into multiple levels (first level, second level, third level) with different wear characteristics. By distributing write operations across these segmented levels, the system achieves wear-leveling and extends the overall lifespan of the Flash memory while maintaining high storage capacity.

Inventive Principle:
Principle #1Segmentation

2Reliability

If authentication information is stored in Flash memory, then data security is improved, but the system becomes vulnerable to power interruption attacks

Engineering Contradiction:
Improvedata securityVSAvoidpower interruption vulnerability
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent implements preliminary authentication actions by storing authentication information at multiple hierarchical levels before power interruption can occur. The first authentication information is stored with data entries, while second authentication information is stored with mapping entries, and third authentication information is stored separately. This multi-level preliminary authentication structure ensures that even if power is interrupted during a write operation, the authenticity of the data can be verified through the hierarchical authentication scheme.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If hierarchical authentication scheme is implemented, then data integrity and security are enhanced, but device complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidauthentication mechanism complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs a nested authentication structure where first authentication information is embedded with data entries, second authentication information is embedded with mapping entries, and third authentication information is stored at a higher hierarchical level. This nested arrangement allows the authentication mechanism to be organized in concentric layers, making the complex authentication process more manageable and systematically verifiable while maintaining strong data integrity.

Inventive Principle:
Principle #7Nested doll (Nesting)

4Reliability

If multiple authentication information levels are stored, then security against power interruption attacks is improved, but storage space requirements increase

Engineering Contradiction:
Improvesecurity against power interruptionVSAvoidstorage space consumption
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies different authentication quality levels to different parts of the storage system. First authentication information is provided for data entries, second authentication information for mapping entries, and third authentication information for additional security layers. This localized quality approach ensures that authentication is applied where most needed while optimizing storage space utilization by not uniformly applying maximum authentication to all data structures.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11100011B2Flash translation layer with hierarchical security
Publication Date: 2021.08.24 ALTAIR SEMICON LTD
  • US11100011B2 patent drawing
  • US11100011B2 patent drawing
  • US11100011B2 patent drawing

AI summary

A computing device includes a non-volatile memory (NVM) interface and a processor. The NVM interface is configured to communicate with an NVM. The processor is configured to store in the NVM at least (i) data entries including data and (ii) mapping entries including mapping information that indicate physical addresses in which the data entries are stored in the NVM, and to verify authenticity of the data entries and of the mapping entries using a hierarchical authentication scheme in which (i) the data entries include first authentication information that authenticates the data, and (ii) the mapping entries include second authentication information that authenticates both the mapping information and the data entries.