Multi-Core FTL Data Storage Device Metadata Segmentation
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Solution Overview
Problem
In multi-core data storage devices, existing methods do not efficiently improve write performance by separating metadata storage across independent flash translation layer (FTL) cores, leading to suboptimal data processing speeds.
Innovation Solution
A data storage device configuration with multiple nonvolatile memory groups coupled to independent FTL cores and a common memory that allows metadata to be written and stored across counterpart cores, enabling concurrent metadata write operations and improving write performance by overlapping user data and metadata storage processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If metadata is stored in the same memory as user data in a multi-core FTL system, then device complexity is reduced, but write performance deteriorates due to sequential processing bottlenecks
Solution Approach 1:
The patent divides the storage system into separate functional segments: user data is stored in dedicated nonvolatile memory groups (first and second groups) while metadata is stored in a separate common memory. This segmentation allows independent parallel processing across multiple FTL cores, eliminating the sequential bottleneck that would occur if all data resided in a single memory space.
Solution Approach 2:
The common memory acts as an intermediary structure that receives metadata from multiple FTL cores simultaneously. This intermediary enables decoupling of user data writing (handled by individual FTL cores to their respective nonvolatile memory groups) from metadata writing (handled by the common memory), allowing these operations to proceed in parallel without interfering with each other.
2Speed
If multiple FTL cores share the same memory resources, then ease of operation is improved, but data processing speed deteriorates due to resource contention
Solution Approach 1:
Memory resources are segmented into distinct functional areas: nonvolatile memory groups for user data and a common memory for metadata. This segmentation eliminates resource contention by assigning specific memory spaces to specific tasks, allowing FTL cores to operate independently without competing for the same memory bandwidth or access resources.
Solution Approach 2:
The patent introduces a new dimensional organization of memory resources by separating user data storage (in nonvolatile memory groups) from metadata storage (in common memory). This dimensional separation transforms the traditional flat memory architecture into a hierarchical, multi-dimensional structure that enables parallel access paths and eliminates the single-point bottleneck of shared memory.
3Loss of time
If metadata write operations are performed sequentially by each FTL core, then device complexity is reduced, but loss of time increases due to inability to overlap operations
Solution Approach 1:
The memory system is segmented into parallel write paths: user data writes to nonvolatile memory groups while metadata writes to the common memory. This segmentation enables overlapping of user data and metadata write operations, as each type of data can be written simultaneously to its designated memory without waiting for the other operation to complete.
Solution Approach 2:
The common memory continuously receives metadata from multiple FTL cores in parallel, maintaining continuous useful action during write operations. Unlike sequential processing where FTL cores would wait for metadata writes to complete, this architecture allows metadata accumulation and writing to proceed continuously alongside user data operations, maximizing utilization of write channels.
Data Source
AI summary
A data storage device includes a nonvolatile memory device which includes a first nonvolatile memory group including a plurality of first nonvolatile memories coupled to a first flash translation layer (FTL) core and a second nonvolatile memory group including a plurality of second nonvolatile memories coupled to a second FTL core, and a controller including the first FTL core configured to write first user data transmitted from the host device and second metadata related to second user data in one among the plurality of first nonvolatile memories and a common memory.