Full Bridge Converter Feedback Timing for Common-Mode EMI
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Solution Overview
Problem
Switch mode power supplies experience common-mode electromagnetic interference (EMI) due to timing mismatches between switching elements, which can damage components and disrupt other devices.
Innovation Solution
Implementing a feedback mechanism to adjust timing parameters of switching elements using incremental control, such as adjusting slew rate, delay, or other timing characteristics based on direct measurement of common-mode voltages, to synchronize switching operations and reduce EMI.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If switch mode power supplies operate at high frequencies, then efficiency and size are improved, but common-mode EMI increases
Solution Approach 1:
The patent implements a feedback mechanism that samples the common-mode voltage at the switching node and uses this information to dynamically adjust the switching timing of individual MOSFETs. The feedback circuit measures the common-mode voltage waveform and generates control signals that modify gate drive timing to minimize EMI-generating transitions, thereby resolving the contradiction between high-frequency operation and EMI reduction.
Solution Approach 2:
The patent dynamically adjusts the switching timing parameters (such as dead time and gate drive delays) of the MOSFETs based on real-time common-mode voltage measurements. This dynamic adjustment allows the system to maintain high-frequency operation while adaptively minimizing EMI emissions by optimizing switching transitions according to actual circuit conditions.
2Object-generated harmful factors
If switching elements are synchronized to reduce EMI, then EMI is reduced, but timing precision requirements increase
Solution Approach 1:
The feedback mechanism continuously monitors the common-mode voltage and automatically adjusts switching timing to achieve synchronization. This closed-loop approach compensates for component variations and parasitic effects, making the system robust against manufacturing tolerances while achieving the precise timing synchronization needed for EMI reduction.
Solution Approach 2:
The patent changes timing parameters (gate drive delays, dead time) based on measured common-mode voltage characteristics. By dynamically adjusting these parameters, the system achieves precise synchronization without requiring extremely tight manufacturing tolerances on fixed timing components.
Data Source
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Figure 3A~3B
AI summary
A switched power circuit to control a common-mode signal. The switched power circuit includes a first switch and a second switch configured to generate switch mode voltage between a first node and a second node. The switched power circuit further includes a feedback circuit that is configured to detect common-mode voltage generated between the first node and the second node by a first signal generated by the first switch and a second signal generated by the second switch, and incrementally adjust a timing parameter of the first signal to adjust the common-mode signal.