Full-Bridge Gate Charge Recycling for Lower PMOS Switching Loss
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Solution Overview
Problem
Power losses due to gate losses in full-bridge circuits, particularly in high-frequency and high-power applications, are significant due to the high gate capacitance of PMOS devices, which are often larger than NMOS devices, leading to inefficiencies.
Innovation Solution
Recoup the charge stored in the gate of the PMOS high-side transistor and use it to turn on the corresponding NMOS low-side transistor, routing excess charge to a capacitor or load, thereby reducing power losses by avoiding discharge to ground.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the gate capacitance of PMOS devices is increased to handle high-power applications, then the power handling capability is improved, but the gate losses increase significantly
Solution Approach 1:
The patent converts the harmful gate charge loss into a beneficial resource by routing the discharge current from the PMOS gate capacitance through the NMOS gate, thereby turning the wasted energy into useful switching activation for the NMOS device
Solution Approach 2:
The patent merges two separate functions into a single circuit path: the PMOS gate discharge function and the NMOS gate charge function are combined into one current path, allowing simultaneous turn-off of PMOS and turn-on of NMOS
2Productivity
If the switching frequency is increased to improve system performance, then the productivity is improved, but the gate losses increase due to more frequent charging and discharging
Solution Approach 1:
By converting the previously wasted gate discharge energy into useful NMOS gate charge, the patent eliminates the need for separate charging operations at each switching cycle, thereby reducing cumulative losses at high switching frequencies
3Power
If the gate voltage VgsON is increased to improve device conduction, then the power handling capability is improved, but the gate losses increase due to higher charging energy requirements
Solution Approach 1:
The patent recovers the energy that would otherwise be discarded during PMOS gate discharge and applies it to charge the NMOS gate, thereby recovering useful work from what would have been pure loss
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power losses by utilizing the stored charge in PMOS gates to charge NMOS gates, increasing circuit efficiency and reducing energy waste.
Implementation Method 1
the first PMOS high-side transistor device has a gate capacitance higher than a gate capacitance of the first NMOS low-side transistor device
Data Source
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AI summary
A circuit, which might be a full-bridge driver circuit, comprises a first PMOS high-side transistor device and a first NMOS low-side transistor device. The circuit further comprises turn-on circuitry configured to turn on the first PMOS high-side transistor device while simultaneously turning on the first NMOS low-side transistor device, by routing charge stored in a gate of the first PMOS high-side transistor device to a gate of the first NMOS low-side transistor device, to charge the gate of the first NMOS low-side transistor device.